diff options
| author | Anson Huang <Anson.Huang@nxp.com> | 2019-01-15 10:22:06 +0800 |
|---|---|---|
| committer | Anson Huang <Anson.Huang@nxp.com> | 2019-01-17 10:49:48 +0800 |
| commit | 1552df5d25944b2bddf42e96acbadca18b3c7c95 (patch) | |
| tree | f8236136c6318c665e63b82fac9c685143ff1c07 /plat/imx/common/include/sci/sci.h | |
| parent | cd1f39b48ab4a0596ace57cc920e4d4ba6e92784 (diff) | |
Support for NXP's i.MX8 SoCs timer IPC
NXP's i.MX8 SoCs have system controller (M4 core) which takes
control of timer management, including watchdog, srtc and system
counter etc., other clusters like Cortex-A35 can send out command
via MU (Message Unit) to system controller for timer operation.
This patch adds timer IPC(inter-processor communication) support.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Diffstat (limited to 'plat/imx/common/include/sci/sci.h')
| -rw-r--r-- | plat/imx/common/include/sci/sci.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/plat/imx/common/include/sci/sci.h b/plat/imx/common/include/sci/sci.h index f0a25027..1b2f699a 100644 --- a/plat/imx/common/include/sci/sci.h +++ b/plat/imx/common/include/sci/sci.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -15,5 +15,6 @@ #include <sci/svc/pad/sci_pad_api.h> #include <sci/svc/pm/sci_pm_api.h> #include <sci/svc/rm/sci_rm_api.h> +#include <sci/svc/timer/sci_timer_api.h> #endif /* SCI_H */ |