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authorYe Li <ye.li@nxp.com>2017-07-21 04:12:54 -0500
committerYe Li <ye.li@nxp.com>2017-07-21 04:34:50 -0500
commit931d00ff7f4a1ad67367603dee8913388cb9cf2d (patch)
tree6fa6f152b33d81e3ac1fa30fd8a8d3a33ace416b /plat/freescale/imx8qm/imx8qm_bl31_setup.c
parentf14367e5c33a85a6b6a33f321f57d7c819dda45e (diff)
imx8qm/qxp: Reserve memory region for ATF
Reserve the memory region that is only can access by ATF. ATF is running in this memory region, while masters in other partitions can't access it. Signed-off-by: Ye Li <ye.li@nxp.com>
Diffstat (limited to 'plat/freescale/imx8qm/imx8qm_bl31_setup.c')
-rw-r--r--plat/freescale/imx8qm/imx8qm_bl31_setup.c41
1 files changed, 37 insertions, 4 deletions
diff --git a/plat/freescale/imx8qm/imx8qm_bl31_setup.c b/plat/freescale/imx8qm/imx8qm_bl31_setup.c
index 2035a98e..acf53c54 100644
--- a/plat/freescale/imx8qm/imx8qm_bl31_setup.c
+++ b/plat/freescale/imx8qm/imx8qm_bl31_setup.c
@@ -191,7 +191,7 @@ void mx8_partition_resources(void)
{
sc_err_t err;
sc_rm_pt_t secure_part, os_part;
- sc_rm_mr_t mr;
+ sc_rm_mr_t mr, mr_record = 64;
bool owned;
sc_faddr_t start, end;
int i;
@@ -236,9 +236,42 @@ void mx8_partition_resources(void)
} else {
NOTICE("Memreg %u 0x%lx -- 0x%lx\n", mr, start, end);
- err = sc_rm_assign_memreg(ipc_handle, os_part, mr);
- if (err)
- ERROR("Memreg assign failed, 0x%lx -- 0x%lx\n", start, end);
+ if (BL31_BASE >= start && (BL31_LIMIT - 1) <= end) {
+ mr_record = mr; /* Record the mr for ATF running */
+ } else {
+ err = sc_rm_assign_memreg(ipc_handle, os_part, mr);
+ if (err)
+ ERROR("Memreg assign failed, 0x%lx -- 0x%lx, err %d\n", start, end, err);
+ }
+ }
+ }
+ }
+
+ if (mr_record != 64) {
+ err = sc_rm_get_memreg_info(ipc_handle, mr_record, &start, &end);
+ if (err) {
+ ERROR("Memreg get info failed, %u\n", mr_record);
+ } else {
+ if ((BL31_LIMIT - 1) < end) {
+ err = sc_rm_memreg_alloc(ipc_handle, &mr, BL31_LIMIT, end);
+ if (err) {
+ ERROR("sc_rm_memreg_alloc failed, 0x%lx -- 0x%lx\n", (sc_faddr_t)BL31_LIMIT, end);
+ } else {
+ err = sc_rm_assign_memreg(ipc_handle, os_part, mr);
+ if (err)
+ ERROR("Memreg assign failed, 0x%lx -- 0x%lx\n", (sc_faddr_t)BL31_LIMIT, end);
+ }
+ }
+
+ if (start < (BL31_BASE - 1)) {
+ err = sc_rm_memreg_alloc(ipc_handle, &mr, start, BL31_BASE - 1);
+ if (err) {
+ ERROR("sc_rm_memreg_alloc failed, 0x%lx -- 0x%lx\n", start, (sc_faddr_t)BL31_BASE - 1);
+ } else {
+ err = sc_rm_assign_memreg(ipc_handle, os_part, mr);
+ if (err)
+ ERROR("Memreg assign failed, 0x%lx -- 0x%lx\n", start, (sc_faddr_t)BL31_BASE - 1);
+ }
}
}
}