Update to the latest SCFW API.

Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>

3 files changed, 367 insertions, 209 deletions

diff --git a/plat/freescale/common/include/sci/svc/pad/api.h b/plat/freescale/common/include/sci/svc/pad/api.h
index fb6e78c1..c57b48a0 100644..100755
--- a/plat/freescale/common/include/sci/svc/pad/api.h
+++ b/plat/freescale/common/include/sci/svc/pad/api.h
@@ -42,7 +42,11 @@
  * info on these can be found in the associated Reference Manual.
  *
  * Pads are managed as a resource by the Resource Manager (RM).  They have
- * assigned owners and only the owners can configure the pads.
+ * assigned owners and only the owners can configure the pads. Some of the
+ * pads are reserved for use by the SCFW itself and this can be overriden
+ * with the implementation of board_config_sc(). Additionally, pads may
+ * be assigned to various other partitions via SCD or via the implementation
+ * of board_system_config().
  *
  * @{
  */
@@ -61,7 +65,79 @@
  * @name Defines for type widths
  */
 /*@{*/
-#define SC_PAD_MUX_W        3       /*!< Width of mux parameter */
+#define SC_PAD_MUX_W            3	/* Width of mux parameter */
+/*@}*/
+
+/*!
+ * @name Defines for sc_pad_config_t
+ */
+/*@{*/
+#define SC_PAD_CONFIG_NORMAL    0	/* Normal */
+#define SC_PAD_CONFIG_OD        1	/* Open Drain */
+#define SC_PAD_CONFIG_OD_IN     2	/* Open Drain and input */
+#define SC_PAD_CONFIG_OUT_IN    3	/* Output and input */
+/*@}*/
+
+/*!
+ * @name Defines for sc_pad_iso_t
+ */
+/*@{*/
+#define SC_PAD_ISO_OFF          0	/* ISO latch is transparent */
+#define SC_PAD_ISO_EARLY        1	/* Follow EARLY_ISO */
+#define SC_PAD_ISO_LATE         2	/* Follow LATE_ISO */
+#define SC_PAD_ISO_ON           3	/* ISO latched data is held */
+/*@}*/
+
+/*!
+ * @name Defines for sc_pad_28fdsoi_dse_t
+ */
+/*@{*/
+#define SC_PAD_28FDSOI_DSE_18V_1MA   0	/* Drive strength of 1mA for 1.8v */
+#define SC_PAD_28FDSOI_DSE_18V_2MA   1	/* Drive strength of 2mA for 1.8v */
+#define SC_PAD_28FDSOI_DSE_18V_4MA   2	/* Drive strength of 4mA for 1.8v */
+#define SC_PAD_28FDSOI_DSE_18V_6MA   3	/* Drive strength of 6mA for 1.8v */
+#define SC_PAD_28FDSOI_DSE_18V_8MA   4	/* Drive strength of 8mA for 1.8v */
+#define SC_PAD_28FDSOI_DSE_18V_10MA  5	/* Drive strength of 10mA for 1.8v */
+#define SC_PAD_28FDSOI_DSE_18V_12MA  6	/* Drive strength of 12mA for 1.8v */
+#define SC_PAD_28FDSOI_DSE_18V_HS    7	/* High-speed drive strength for 1.8v */
+#define SC_PAD_28FDSOI_DSE_33V_2MA   0	/* Drive strength of 2mA for 3.3v */
+#define SC_PAD_28FDSOI_DSE_33V_4MA   1	/* Drive strength of 4mA for 3.3v */
+#define SC_PAD_28FDSOI_DSE_33V_8MA   2	/* Drive strength of 8mA for 3.3v */
+#define SC_PAD_28FDSOI_DSE_33V_12MA  3	/* Drive strength of 12mA for 3.3v */
+#define SC_PAD_28FDSOI_DSE_DV_HIGH   0	/* High drive strength for dual volt */
+#define SC_PAD_28FDSOI_DSE_DV_LOW    1	/* Low drive strength for dual volt */
+/*@}*/
+
+/*!
+ * @name Defines for sc_pad_28fdsoi_ps_t
+ */
+/*@{*/
+#define SC_PAD_28FDSOI_PS_KEEPER 0	/* Bus-keeper (only valid for 1.8v) */
+#define SC_PAD_28FDSOI_PS_PU     1	/* Pull-up */
+#define SC_PAD_28FDSOI_PS_PD     2	/* Pull-down */
+#define SC_PAD_28FDSOI_PS_NONE   3	/* No pull (disabled) */
+/*@}*/
+
+/*!
+ * @name Defines for sc_pad_28fdsoi_pus_t
+ */
+/*@{*/
+#define SC_PAD_28FDSOI_PUS_30K_PD  0	/* 30K pull-down */
+#define SC_PAD_28FDSOI_PUS_100K_PU 1	/* 100K pull-up */
+#define SC_PAD_28FDSOI_PUS_3K_PU   2	/* 3K pull-up */
+#define SC_PAD_28FDSOI_PUS_30K_PU  3	/* 30K pull-up */
+/*@}*/
+
+/*!
+ * @name Defines for sc_pad_wakeup_t
+ */
+/*@{*/
+#define SC_PAD_WAKEUP_OFF       0	/* Off */
+#define SC_PAD_WAKEUP_CLEAR     1	/* Clears pending flag */
+#define SC_PAD_WAKEUP_LOW_LVL   4	/* Low level */
+#define SC_PAD_WAKEUP_FALL_EDGE 5	/* Falling edge */
+#define SC_PAD_WAKEUP_RISE_EDGE 6	/* Rising edge */
+#define SC_PAD_WAKEUP_HIGH_LVL  7	/* High-level */
 /*@}*/
 
 /* Types */
@@ -73,13 +149,7 @@
  * when the output is not driven.  The IN options are less common and
  * force an input connection even when driving the output.
  */
-typedef enum sc_pad_config_e
-{
-    SC_PAD_CONFIG_NORMAL    = 0,    /*!< Normal */
-    SC_PAD_CONFIG_OD        = 1,    /*!< Open Drain */
-    SC_PAD_CONFIG_OD_IN     = 2,    /*!< Open Drain and input */
-    SC_PAD_CONFIG_OUT_IN    = 3     /*!< Output and input */
-} sc_pad_config_t;
+typedef uint8_t sc_pad_config_t;
 
 /*!
  * This type is used to declare a pad low-power isolation config.
@@ -87,84 +157,30 @@ typedef enum sc_pad_config_e
  * an output pad is directly determined by another input pad. The
  * other two are only used when SW wants to directly contol isolation.
  */
-typedef enum sc_pad_iso_e
-{
-    SC_PAD_ISO_OFF          = 0,    /*!< ISO latch is transparent */
-    SC_PAD_ISO_EARLY        = 1,    /*!< Follow EARLY_ISO */
-    SC_PAD_ISO_LATE         = 2,    /*!< Follow LATE_ISO */
-    SC_PAD_ISO_ON           = 3     /*!< ISO latched data is held */
-} sc_pad_iso_t;
-
-/*!
- * This type is used to declare a drive strength. Note it is specific
- * to 28LPP.
- */
-typedef enum sc_pad_28lpp_dse_e
-{
-    SC_PAD_28LPP_DSE_x1     = 0,    /*!< Drive strength x1 */
-    SC_PAD_28LPP_DSE_x4     = 1,    /*!< Drive strength x4 */
-    SC_PAD_28LPP_DSE_x2     = 2,    /*!< Drive strength x2 */
-    SC_PAD_28LPP_DSE_x6     = 3     /*!< Drive strength x6 */
-} sc_pad_28lpp_dse_t;
+typedef uint8_t sc_pad_iso_t;
 
 /*!
  * This type is used to declare a drive strength. Note it is specific
  * to 28FDSOI. Also note that valid values depend on the pad type.
  */
-typedef enum sc_pad_28fdsio_dse_e
-{
-    SC_PAD_28FDSOI_DSE_18V_1MA   = 0,    /*!< Drive strength of 1mA for 1.8v */
-    SC_PAD_28FDSOI_DSE_18V_2MA   = 1,    /*!< Drive strength of 2mA for 1.8v */
-    SC_PAD_28FDSOI_DSE_18V_4MA   = 2,    /*!< Drive strength of 4mA for 1.8v */
-    SC_PAD_28FDSOI_DSE_18V_6MA   = 3,    /*!< Drive strength of 6mA for 1.8v */
-    SC_PAD_28FDSOI_DSE_18V_8MA   = 4,    /*!< Drive strength of 8mA for 1.8v */
-    SC_PAD_28FDSOI_DSE_18V_10MA  = 5,    /*!< Drive strength of 10mA for 1.8v */
-    SC_PAD_28FDSOI_DSE_18V_12MA  = 6,    /*!< Drive strength of 12mA for 1.8v */
-    SC_PAD_28FDSOI_DSE_33V_2MA   = 0,    /*!< Drive strength of 2mA for 3.3v */
-    SC_PAD_28FDSOI_DSE_33V_4MA   = 1,    /*!< Drive strength of 4mA for 3.3v */
-    SC_PAD_28FDSOI_DSE_33V_8MA   = 2,    /*!< Drive strength of 8mA for 3.3v */
-    SC_PAD_28FDSOI_DSE_33V_12MA  = 3,    /*!< Drive strength of 12mA for 3.3v */
-    SC_PAD_28FDSOI_DSE_33V_HS    = 7,    /*!< High-speed drive strength for 1.8v */
-    SC_PAD_28FDSOI_DSE_DV_LOW    = 0,    /*!< Low drive strength for dual volt */
-    SC_PAD_28FDSOI_DSE_DV_HIGH   = 1     /*!< High drive strength for dual volt */
-} sc_pad_28fdsoi_dse_t;
+typedef uint8_t sc_pad_28fdsoi_dse_t;
 
 /*!
  * This type is used to declare a pull select. Note it is specific
- * to 28LPP.
+ * to 28FDSOI.
  */
-typedef enum sc_pad_28lpp_ps_e
-{
-    SC_PAD_28LPP_PS_PD      = 0,    /*!< Pull down */
-    SC_PAD_28LPP_PS_PU_5K   = 1,    /*!< 5K pull up */
-    SC_PAD_28LPP_PS_PU_47K  = 2,    /*!< 47K pull up */
-    SC_PAD_28LPP_PS_PU_100K = 3     /*!< 100K pull up */
-} sc_pad_28lpp_ps_t;
+typedef uint8_t sc_pad_28fdsoi_ps_t;
 
 /*!
- * This type is used to declare a pull select. Note it is specific
- * to 28FDSOI.
+ * This type is used to declare a pull-up select. Note it is specific
+ * to 28FDSOI HSIC pads.
  */
-typedef enum sc_pad_28fdsoi_ps_e
-{
-    SC_PAD_28FDSOI_PS_KEEPER = 0,    /*!< Bus-keeper (only valid for 1.8v) */
-    SC_PAD_28FDSOI_PS_PU     = 1,    /*!< Pull-up */
-    SC_PAD_28FDSOI_PS_PD     = 2,    /*!< Pull-down */
-    SC_PAD_28FDSOI_PS_NONE   = 3     /*!< No pull (disabled) */
-} sc_pad_28fdsoi_ps_t;
+typedef uint8_t sc_pad_28fdsoi_pus_t;
 
 /*!
  * This type is used to declare a wakeup mode of a pad.
  */
-typedef enum sc_pad_wakeup_e
-{
-    SC_PAD_WAKEUP_OFF       = 0,    /*!< Off */
-    SC_PAD_WAKEUP_CLEAR     = 1,    /*!< Clears pending flag */
-    SC_PAD_WAKEUP_LOW_LVL   = 4,    /*!< Low level */
-    SC_PAD_WAKEUP_FALL_EDGE = 5,    /*!< Falling edge */
-    SC_PAD_WAKEUP_RISE_EDGE = 6,    /*!< Rising edge */
-    SC_PAD_WAKEUP_HIGH_LVL  = 7     /*!< High-level */
-} sc_pad_wakeup_t;
+typedef uint8_t sc_pad_wakeup_t;
 
 /* Functions */
 
@@ -213,7 +229,8 @@ sc_err_t sc_pad_set_mux(sc_ipc_t ipc, sc_pad_t pad,
  * Refer to the SoC [Pad List](@ref PADS) for valid pad values.
  */
 sc_err_t sc_pad_get_mux(sc_ipc_t ipc, sc_pad_t pad,
-    uint8_t *mux, sc_pad_config_t *config, sc_pad_iso_t *iso);
+			uint8_t *mux, sc_pad_config_t *config,
+			sc_pad_iso_t *iso);
 
 /*!
  * This function configures the general purpose pad control. This
@@ -270,8 +287,7 @@ sc_err_t sc_pad_get_gp(sc_ipc_t ipc, sc_pad_t pad, uint32_t *ctrl);
  *
  * Refer to the SoC [Pad List](@ref PADS) for valid pad values.
  */
-sc_err_t sc_pad_set_wakeup(sc_ipc_t ipc, sc_pad_t pad,
-    sc_pad_wakeup_t wakeup);
+sc_err_t sc_pad_set_wakeup(sc_ipc_t ipc, sc_pad_t pad, sc_pad_wakeup_t wakeup);
 
 /*!
  * This function gets the wakeup mode of a pad.
@@ -288,8 +304,7 @@ sc_err_t sc_pad_set_wakeup(sc_ipc_t ipc, sc_pad_t pad,
  *
  * Refer to the SoC [Pad List](@ref PADS) for valid pad values.
  */
-sc_err_t sc_pad_get_wakeup(sc_ipc_t ipc, sc_pad_t pad,
-    sc_pad_wakeup_t *wakeup);
+sc_err_t sc_pad_get_wakeup(sc_ipc_t ipc, sc_pad_t pad, sc_pad_wakeup_t *wakeup);
 
 /*!
  * This function configures a pad.
@@ -340,8 +355,8 @@ sc_err_t sc_pad_set_all(sc_ipc_t ipc, sc_pad_t pad, uint8_t mux,
  * Refer to the SoC [Pad List](@ref PADS) for valid pad values.
  */
 sc_err_t sc_pad_get_all(sc_ipc_t ipc, sc_pad_t pad, uint8_t *mux,
-    sc_pad_config_t *config, sc_pad_iso_t *iso, uint32_t *ctrl,
-    sc_pad_wakeup_t *wakeup);
+			sc_pad_config_t *config, sc_pad_iso_t *iso,
+			uint32_t *ctrl, sc_pad_wakeup_t *wakeup);
 
 /* @} */
 
@@ -394,14 +409,11 @@ sc_err_t sc_pad_get(sc_ipc_t ipc, sc_pad_t pad, uint32_t *val);
  */
 
 /*!
- * This function configures the pad control specific to 28LPP.
+ * This function configures the pad control specific to 28FDSOI.
  *
  * @param[in]     ipc         IPC handle
  * @param[in]     pad         pad to configure
  * @param[in]     dse         drive strength
- * @param[in]     sre         slew rate
- * @param[in]     hys         hysteresis
- * @param[in]     pe          pull enable
  * @param[in]     ps          pull select
  *
  * @return Returns an error code (SC_ERR_NONE = success).
@@ -413,19 +425,16 @@ sc_err_t sc_pad_get(sc_ipc_t ipc, sc_pad_t pad, uint32_t *val);
  *
  * Refer to the SoC [Pad List](@ref PADS) for valid pad values.
  */
-sc_err_t sc_pad_set_gp_28lpp(sc_ipc_t ipc, sc_pad_t pad,
-    sc_pad_28lpp_dse_t dse, bool sre, bool hys, bool pe,
-    sc_pad_28lpp_ps_t ps);
+sc_err_t sc_pad_set_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad,
+			       sc_pad_28fdsoi_dse_t dse,
+			       sc_pad_28fdsoi_ps_t ps);
 
 /*!
- * This function gets the pad control specific to 28LPP.
+ * This function gets the pad control specific to 28FDSOI.
  *
  * @param[in]     ipc         IPC handle
  * @param[in]     pad         pad to query
  * @param[out]    dse         pointer to return drive strength
- * @param[out]    sre         pointer to return slew rate
- * @param[out]    hys         pointer to return hysteresis
- * @param[out]    pe          pointer to return pull enable
  * @param[out]    ps          pointer to return pull select
  *
  * @return Returns an error code (SC_ERR_NONE = success).
@@ -437,9 +446,9 @@ sc_err_t sc_pad_set_gp_28lpp(sc_ipc_t ipc, sc_pad_t pad,
  *
  * Refer to the SoC [Pad List](@ref PADS) for valid pad values.
  */
-sc_err_t sc_pad_get_gp_28lpp(sc_ipc_t ipc, sc_pad_t pad,
-    sc_pad_28lpp_dse_t *dse, bool *sre, bool *hys, bool *pe,
-    sc_pad_28lpp_ps_t *ps);
+sc_err_t sc_pad_get_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad,
+			       sc_pad_28fdsoi_dse_t *dse,
+			       sc_pad_28fdsoi_ps_t *ps);
 
 /*!
  * This function configures the pad control specific to 28FDSOI.
@@ -447,7 +456,10 @@ sc_err_t sc_pad_get_gp_28lpp(sc_ipc_t ipc, sc_pad_t pad,
  * @param[in]     ipc         IPC handle
  * @param[in]     pad         pad to configure
  * @param[in]     dse         drive strength
- * @param[in]     ps          pull select
+ * @param[in]     hys         hysteresis
+ * @param[in]     pus         pull-up select
+ * @param[in]     pke         pull keeper enable
+ * @param[in]     pue         pull-up enable
  *
  * @return Returns an error code (SC_ERR_NONE = success).
  *
@@ -458,8 +470,10 @@ sc_err_t sc_pad_get_gp_28lpp(sc_ipc_t ipc, sc_pad_t pad,
  *
  * Refer to the SoC [Pad List](@ref PADS) for valid pad values.
  */
-sc_err_t sc_pad_set_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad,
-    sc_pad_28fdsoi_dse_t dse, sc_pad_28fdsoi_ps_t ps);
+sc_err_t sc_pad_set_gp_28fdsoi_hsic(sc_ipc_t ipc, sc_pad_t pad,
+				    sc_pad_28fdsoi_dse_t dse, bool hys,
+				    sc_pad_28fdsoi_pus_t pus, bool pke,
+				    bool pue);
 
 /*!
  * This function gets the pad control specific to 28FDSOI.
@@ -467,7 +481,10 @@ sc_err_t sc_pad_set_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad,
  * @param[in]     ipc         IPC handle
  * @param[in]     pad         pad to query
  * @param[out]    dse         pointer to return drive strength
- * @param[out]    ps          pointer to return pull select
+ * @param[out]    hys         pointer to return hysteresis
+ * @param[out]    pus         pointer to return pull-up select
+ * @param[out]    pke         pointer to return pull keeper enable
+ * @param[out]    pue         pointer to return pull-up enable
  *
  * @return Returns an error code (SC_ERR_NONE = success).
  *
@@ -478,8 +495,10 @@ sc_err_t sc_pad_set_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad,
  *
  * Refer to the SoC [Pad List](@ref PADS) for valid pad values.
  */
-sc_err_t sc_pad_get_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad,
-    sc_pad_28fdsoi_dse_t *dse, sc_pad_28fdsoi_ps_t *ps);
+sc_err_t sc_pad_get_gp_28fdsoi_hsic(sc_ipc_t ipc, sc_pad_t pad,
+				    sc_pad_28fdsoi_dse_t *dse, bool *hys,
+				    sc_pad_28fdsoi_pus_t * pus, bool *pke,
+				    bool *pue);
 
 /*!
  * This function configures the compensation control specific to 28FDSOI.
@@ -491,6 +510,7 @@ sc_err_t sc_pad_get_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad,
  * @param[in]     rasrcp      compensation code for PMOS
  * @param[in]     rasrcn      compensation code for NMOS
  * @param[in]     nasrc_sel   NASRC read select
+ * @param[in]     psw_ovr     2.5v override
  *
  * @return Returns an error code (SC_ERR_NONE = success).
  *
@@ -500,23 +520,28 @@ sc_err_t sc_pad_get_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad,
  * - SC_ERR_UNAVAILABLE if process not applicable
  *
  * Refer to the SoC [Pad List](@ref PADS) for valid pad values.
+ *
+ * Note \a psw_ovr is only applicable to pads supporting 2.5 volt
+ * operation (e.g. some Ethernet pads).
  */
 sc_err_t sc_pad_set_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pad_t pad,
-    uint8_t compen, bool fastfrz, uint8_t rasrcp, uint8_t rasrcn,
-    bool nasrc_sel);
+				    uint8_t compen, bool fastfrz,
+				    uint8_t rasrcp, uint8_t rasrcn,
+				    bool nasrc_sel, bool psw_ovr);
 
 /*!
  * This function gets the compensation control specific to 28FDSOI.
  *
  * @param[in]     ipc         IPC handle
  * @param[in]     pad         pad to query
- * @param[in]     compen      pointer to return compensation/freeze mode
- * @param[in]     fastfrz     pointer to return fast freeze
- * @param[in]     rasrcp      pointer to return compensation code for PMOS
- * @param[in]     rasrcn      pointer to return compensation code for NMOS
- * @param[in]     nasrc_sel   pointer to return NASRC read select
- * @param[in]     compok      pointer to return compensation status
- * @param[in]     nasrc       pointer to return NASRCP/NASRCN
+ * @param[out]    compen      pointer to return compensation/freeze mode
+ * @param[out]    fastfrz     pointer to return fast freeze
+ * @param[out]    rasrcp      pointer to return compensation code for PMOS
+ * @param[out]    rasrcn      pointer to return compensation code for NMOS
+ * @param[out]    nasrc_sel   pointer to return NASRC read select
+ * @param[out]    compok      pointer to return compensation status
+ * @param[out]    nasrc       pointer to return NASRCP/NASRCN
+ * @param[out]    psw_ovr     pointer to return the 2.5v override
  *
  * @return Returns an error code (SC_ERR_NONE = success).
  *
@@ -528,12 +553,13 @@ sc_err_t sc_pad_set_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pad_t pad,
  * Refer to the SoC [Pad List](@ref PADS) for valid pad values.
  */
 sc_err_t sc_pad_get_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pad_t pad,
-    uint8_t *compen, bool *fastfrz, uint8_t *rasrcp, uint8_t *rasrcn,
-    bool *nasrc_sel, bool *compok, uint8_t *nasrc);
+				    uint8_t *compen, bool *fastfrz,
+				    uint8_t *rasrcp, uint8_t *rasrcn,
+				    bool *nasrc_sel, bool *compok,
+				    uint8_t *nasrc, bool *psw_ovr);
 
 /* @} */
 
 #endif /* _SC_PAD_API_H */
 
 /**@}*/
-
diff --git a/plat/freescale/common/include/sci/svc/pm/api.h b/plat/freescale/common/include/sci/svc/pm/api.h
index d6751289..2d88b7c7 100644..100755
--- a/plat/freescale/common/include/sci/svc/pm/api.h
+++ b/plat/freescale/common/include/sci/svc/pm/api.h
@@ -31,10 +31,10 @@
  * @name Defines for type widths
  */
 /*@{*/
-#define SC_PM_POWER_MODE_W      2       /*!< Width of sc_pm_power_mode_t */
-#define SC_PM_CLOCK_MODE_W      3       /*!< Width of sc_pm_clock_mode_t */
-#define SC_PM_RESET_TYPE_W      1       /*!< Width of sc_pm_reset_type_t */
-#define SC_PM_RESET_REASON_W    3       /*!< Width of sc_pm_reset_reason_t */
+#define SC_PM_POWER_MODE_W      2	/* Width of sc_pm_power_mode_t */
+#define SC_PM_CLOCK_MODE_W      3	/* Width of sc_pm_clock_mode_t */
+#define SC_PM_RESET_TYPE_W      2	/* Width of sc_pm_reset_type_t */
+#define SC_PM_RESET_REASON_W    3	/* Width of sc_pm_reset_reason_t */
 /*@}*/
 
 /*!
@@ -47,7 +47,82 @@
  * @name Defines for ALL parameters
  */
 /*@{*/
-#define SC_PM_CLK_ALL   UINT8_MAX       /*!< All clocks */
+#define SC_PM_CLK_ALL   UINT8_MAX	/* All clocks */
+/*@}*/
+
+/*!
+ * @name Defines for sc_pm_power_mode_t
+ */
+/*@{*/
+#define SC_PM_PW_MODE_OFF       0	/* Power off */
+#define SC_PM_PW_MODE_STBY      1	/* Power in standby */
+#define SC_PM_PW_MODE_LP        2	/* Power in low-power */
+#define SC_PM_PW_MODE_ON        3	/* Power on */
+/*@}*/
+
+/*!
+ * @name Defines for sc_pm_clk_t
+ */
+/*@{*/
+#define SC_PM_CLK_SLV_BUS       0	/* Slave bus clock */
+#define SC_PM_CLK_MST_BUS       1	/* Master bus clock */
+#define SC_PM_CLK_PER           2	/* Peripheral clock */
+#define SC_PM_CLK_PHY           3	/* Phy clock */
+#define SC_PM_CLK_MISC          4	/* Misc clock */
+#define SC_PM_CLK_MISC0         0	/* Misc 0 clock */
+#define SC_PM_CLK_MISC1         1	/* Misc 1 clock */
+#define SC_PM_CLK_MISC2         2	/* Misc 2 clock */
+#define SC_PM_CLK_MISC3         3	/* Misc 3 clock */
+#define SC_PM_CLK_MISC4         4	/* Misc 4 clock */
+#define SC_PM_CLK_CPU           2	/* CPU clock */
+#define SC_PM_CLK_PLL           4	/* PLL */
+#define SC_PM_CLK_BYPASS        4	/* Bypass clock */
+/*@}*/
+
+/*!
+ * @name Defines for sc_pm_clk_mode_t
+ */
+/*@{*/
+#define SC_PM_CLK_MODE_ROM_INIT        0	/* Clock is initialized by ROM. */
+#define SC_PM_CLK_MODE_OFF             1	/* Clock is disabled */
+#define SC_PM_CLK_MODE_ON              2	/* Clock is enabled. */
+#define SC_PM_CLK_MODE_AUTOGATE_SW     3	/* Clock is in SW autogate mode */
+#define SC_PM_CLK_MODE_AUTOGATE_HW     4	/* Clock is in HW autogate mode */
+#define SC_PM_CLK_MODE_AUTOGATE_SW_HW  5	/* Clock is in SW-HW autogate mode */
+/*@}*/
+
+/*!
+ * @name Defines for sc_pm_clk_parent_t
+ */
+/*@{*/
+#define SC_PM_PARENT_XTAL              0	/* Parent is XTAL. */
+#define SC_PM_PARENT_PLL0              1	/* Parent is PLL0 */
+#define SC_PM_PARENT_PLL1              2	/* Parent is PLL1 or PLL0/2 */
+#define SC_PM_PARENT_PLL2              3	/* Parent in PLL2 or PLL0/4 */
+#define SC_PM_PARENT_BYPS              4	/* Parent is a bypass clock. */
+/*@}*/
+
+/*!
+ * @name Defines for sc_pm_reset_type_t
+ */
+/*@{*/
+#define SC_PM_RESET_TYPE_COLD          0	/* Cold reset */
+#define SC_PM_RESET_TYPE_WARM          1	/* Warm reset */
+#define SC_PM_RESET_TYPE_BOARD         2	/* Board reset */
+/*@}*/
+
+/*!
+ * @name Defines for sc_pm_reset_reason_t
+ */
+/*@{*/
+#define SC_PM_RESET_REASON_POR         0	/* Power on reset */
+#define SC_PM_RESET_REASON_WARM        1	/* Warm reset */
+#define SC_PM_RESET_REASON_SW          2	/* Software reset */
+#define SC_PM_RESET_REASON_WDOG        3	/* Watchdog reset */
+#define SC_PM_RESET_REASON_LOCKUP      4	/* Lockup reset */
+#define SC_PM_RESET_REASON_TAMPER      5	/* Tamper reset */
+#define SC_PM_RESET_REASON_TEMP        6	/* Temp reset */
+#define SC_PM_RESET_REASON_LOW_VOLT    7	/* Low voltage reset */
 /*@}*/
 
 /* Types */
@@ -57,58 +132,22 @@
  * SC_PM_PW_MODE_OFF and SC_PM_PW_MODE_ON. The other modes are used only
  * as system power modes.
  */
-typedef enum sc_pm_power_mode_e
-{
-    SC_PM_PW_MODE_OFF           = 0,    /*!< Power off */
-    SC_PM_PW_MODE_STBY          = 1,    /*!< Power in standby */
-    SC_PM_PW_MODE_LP            = 2,    /*!< Power in low-power */
-    SC_PM_PW_MODE_ON            = 3     /*!< Power on */
-} sc_pm_power_mode_t;
+typedef uint8_t sc_pm_power_mode_t;
 
 /*!
  * This type is used to declare a clock.
  */
-typedef enum sc_pm_clk_e
-{
-    SC_PM_CLK_SLV_BUS           = 0,    /*!< Slave bus clock */
-    SC_PM_CLK_MST_BUS           = 1,    /*!< Master bus clock */
-    SC_PM_CLK_PER               = 2,    /*!< Peripheral clock */
-    SC_PM_CLK_PHY               = 3,    /*!< Phy clock */
-    SC_PM_CLK_MISC              = 4,    /*!< Misc clock */
-    SC_PM_CLK_MISC0             = 0,    /*!< Misc 0 clock */
-    SC_PM_CLK_MISC1             = 1,    /*!< Misc 1 clock */
-    SC_PM_CLK_MISC2             = 2,    /*!< Misc 2 clock */
-    SC_PM_CLK_MISC3             = 3,    /*!< Misc 3 clock */
-    SC_PM_CLK_MISC4             = 4,    /*!< Misc 4 clock */
-    SC_PM_CLK_CPU               = 2,    /*!< CPU clock */
-    SC_PM_CLK_PLL               = 4,    /*!< PLL */
-    SC_PM_CLK_BYPASS            = 4     /*!< Bypass clock */
-} sc_pm_clk_t;
+typedef uint8_t sc_pm_clk_t;
 
 /*!
  * This type is used to declare a clock mode.
  */
-typedef enum sc_pm_clk_mode_e
-{
-    SC_PM_CLK_MODE_ROM_INIT        = 0,    /*!< Clock is initialized by ROM. */
-    SC_PM_CLK_MODE_OFF             = 1,    /*!< Clock is disabled */
-    SC_PM_CLK_MODE_ON              = 2,    /*!< Clock is enabled. */
-    SC_PM_CLK_MODE_AUTOGATE_SW     = 3,    /*!< Clock is in SW autogate mode */
-    SC_PM_CLK_MODE_AUTOGATE_HW     = 4,    /*!< Clock is in HW autogate mode */
-    SC_PM_CLK_MODE_AUTOGATE_SW_HW  = 5,    /*!< Clock is in SW-HW autogate mode */
-} sc_pm_clk_mode_t;
+typedef uint8_t sc_pm_clk_mode_t;
 
 /*!
  * This type is used to declare the clock parent.
  */
-typedef enum sc_pm_clk_parent_e
-{
-    XTAL      = 0,          /*! < Parent is XTAL. */
-    PLL0      = 1,          /*! < Parent is PLL0 */
-    PLL1      = 2,          /*! < Parent is PLL1 or PLL0/2 */
-    PLL2      = 3,          /*! < Parent in PLL2 or PLL0/4 */
-    BYPS      = 4           /*! < Parent is a bypass clock. */
-} sc_pm_clk_parent_t;
+typedef uint8_t sc_pm_clk_parent_t;
 
 /*!
  * This type is used to declare clock rates.
@@ -118,26 +157,12 @@ typedef uint32_t sc_pm_clock_rate_t;
 /*!
  * This type is used to declare a desired reset type.
  */
-typedef enum sc_pm_reset_type_e
-{
-    SC_PM_RESET_TYPE_COLD       = 0,    /*!< Cold reset */
-    SC_PM_RESET_TYPE_WARM       = 1     /*!< Warm reset */
-} sc_pm_reset_type_t;
+typedef uint8_t sc_pm_reset_type_t;
 
 /*!
  * This type is used to declare a reason for a reset.
  */
-typedef enum sc_pm_reset_reason_e
-{
-    SC_PM_RESET_REASON_POR      = 0,    /*!< Power on reset */
-    SC_PM_RESET_REASON_WARM     = 1,    /*!< Warm reset */
-    SC_PM_RESET_REASON_SW       = 2,    /*!< Software reset */
-    SC_PM_RESET_REASON_WDOG     = 3,    /*!< Watchdog reset */
-    SC_PM_RESET_REASON_LOCKUP   = 4,    /*!< Lockup reset */
-    SC_PM_RESET_REASON_TAMPER   = 5,    /*!< Tamper reset */
-    SC_PM_RESET_REASON_TEMP     = 6,    /*!< Temp reset */
-    SC_PM_RESET_REASON_LOW_VOLT = 7,    /*!< Low voltage reset */
-} sc_pm_reset_reason_t;
+typedef uint8_t sc_pm_reset_reason_t;
 
 /* Functions */
 
@@ -201,6 +226,11 @@ sc_err_t sc_pm_get_sys_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt,
  * will return an error. Resources set to SC_PM_PW_MODE_ON will reflect the
  * power mode of the partition and will change as that changes.
  *
+ * Note some resources are still not accessible even when powered up if bus
+ * transactions go through a fabric not powered up. Examples of this are
+ * resources in display and capture subsystems which require the display
+ * controller or the imaging subsytem to be powered up first.
+ *
  *  @see sc_pm_set_sys_power_mode().
  */
 sc_err_t sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
@@ -293,7 +323,6 @@ sc_err_t sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource,
 sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource,
     sc_pm_clk_t clk, bool enable, bool autog);
 
-
 /*!
  * This function sets the parent of a resource's clock.
  * This function should only be called when the clock is disabled.
@@ -367,6 +396,8 @@ sc_err_t sc_pm_reset(sc_ipc_t ipc, sc_pm_reset_type_t type);
  *
  * @param[in]     ipc         IPC handle
  * @param[out]    reason      pointer to return reset reason
+ *
+ * @return Returns an error code (SC_ERR_NONE = success).
  */
 sc_err_t sc_pm_reset_reason(sc_ipc_t ipc, sc_pm_reset_reason_t *reason);
 
@@ -407,6 +438,8 @@ sc_err_t sc_pm_boot(sc_ipc_t ipc, sc_rm_pt_t pt,
  * of the booting CPU must be able to handle peripherals and SC state that
  * that are not reset.
  *
+ * If \a type is SC_PM_RESET_TYPE_BOARD, then return with no action.
+ *
  * If this function returns, then the reset did not occur due to an
  * invalid parameter.
  */
@@ -429,6 +462,8 @@ void sc_pm_reboot(sc_ipc_t ipc, sc_pm_reset_type_t type);
  * of the booting CPU must be able to handle peripherals and SC state that
  * that are not reset.
  *
+ * If \a type is SC_PM_RESET_TYPE_BOARD, then return with no action.
+ *
  * @return Returns an error code (SC_ERR_NONE = success).
  *
  * Return errors:
@@ -466,4 +501,3 @@ sc_err_t sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, bool enable,
 #endif /* _SC_PM_API_H */
 
 /**@}*/
-
diff --git a/plat/freescale/common/include/sci/svc/rm/api.h b/plat/freescale/common/include/sci/svc/rm/api.h
index eb472414..acf9338c 100644..100755
--- a/plat/freescale/common/include/sci/svc/rm/api.h
+++ b/plat/freescale/common/include/sci/svc/rm/api.h
@@ -30,20 +30,44 @@
  * @name Defines for type widths
  */
 /*@{*/
-#define SC_RM_PARTITION_W   5       /*!< Width of sc_rm_pt_t */
-#define SC_RM_MEMREG_W      6       /*!< Width of sc_rm_mr_t */
-#define SC_RM_DID_W         4       /*!< Width of sc_rm_did_t */
-#define SC_RM_SID_W         6       /*!< Width of sc_rm_sid_t */
-#define SC_RM_SPA_W         2       /*!< Width of sc_rm_spa_t */
-#define SC_RM_PERM_W        3       /*!< Width of sc_rm_perm_t */
+#define SC_RM_PARTITION_W   5	/* Width of sc_rm_pt_t */
+#define SC_RM_MEMREG_W      6	/* Width of sc_rm_mr_t */
+#define SC_RM_DID_W         4	/* Width of sc_rm_did_t */
+#define SC_RM_SID_W         6	/* Width of sc_rm_sid_t */
+#define SC_RM_SPA_W         2	/* Width of sc_rm_spa_t */
+#define SC_RM_PERM_W        3	/* Width of sc_rm_perm_t */
 /*@}*/
 
 /*!
  * @name Defines for ALL parameters
  */
 /*@{*/
-#define SC_RM_PT_ALL        UINT8_MAX   /*!< All partitions */
-#define SC_RM_MR_ALL        UINT8_MAX   /*!< All memory regions */
+#define SC_RM_PT_ALL        UINT8_MAX	/* All partitions */
+#define SC_RM_MR_ALL        UINT8_MAX	/* All memory regions */
+/*@}*/
+
+/*!
+ * @name Defines for sc_rm_spa_t
+ */
+/*@{*/
+#define SC_RM_SPA_PASSTHRU  0	/* Pass through (attribute driven by master) */
+#define SC_RM_SPA_PASSSID   1	/* Pass through and output on SID */
+#define SC_RM_SPA_ASSERT    2	/* Assert (force to be secure/privileged) */
+#define SC_RM_SPA_NEGATE    3	/* Negate (force to be non-secure/user) */
+/*@}*/
+
+/*!
+ * @name Defines for sc_rm_perm_t
+ */
+/*@{*/
+#define SC_RM_PERM_NONE         0	/* No access */
+#define SC_RM_PERM_SEC_R        1	/* Secure RO */
+#define SC_RM_PERM_SECPRIV_RW   2	/* Secure privilege R/W */
+#define SC_RM_PERM_SEC_RW       3	/* Secure R/W */
+#define SC_RM_PERM_NSPRIV_R     4	/* Secure R/W, non-secure privilege RO */
+#define SC_RM_PERM_NS_R         5	/* Secure R/W, non-secure RO */
+#define SC_RM_PERM_NSPRIV_RW    6	/* Secure R/W, non-secure privilege R/W */
+#define SC_RM_PERM_FULL         7	/* Full access */
 /*@}*/
 
 /* Types */
@@ -72,29 +96,13 @@ typedef uint16_t sc_rm_sid_t;
 /*!
  * This type is a used to declare master transaction attributes.
  */
-typedef enum sc_rm_spa_e
-{
-    SC_RM_SPA_PASSTHRU = 0,        /*!< Pass through (attribute driven by master) */
-    SC_RM_SPA_PASSSID  = 1,        /*!< Pass through and output on SID */
-    SC_RM_SPA_ASSERT   = 2,        /*!< Assert (force to be secure/privileged) */
-    SC_RM_SPA_NEGATE   = 3         /*!< Negate (force to be non-secure/user) */
-} sc_rm_spa_t;
+typedef uint8_t sc_rm_spa_t;
 
 /*!
  * This type is used to declare a resource/memory region access permission.
  * Refer to the XRDC2 Block Guide for more information.
  */
-typedef enum sc_rm_perm_e
-{
-    SC_RM_PERM_NONE       = 0,    /*!< No access */
-    SC_RM_PERM_SEC_R      = 1,    /*!< Secure RO */
-    SC_RM_PERM_SECPRIV_RW = 2,    /*!< Secure privilege R/W */
-    SC_RM_PERM_SEC_RW     = 3,    /*!< Secure R/W */
-    SC_RM_PERM_NSPRIV_R   = 4,    /*!< Secure R/W, non-secure privilege RO */
-    SC_RM_PERM_NS_R       = 5,    /*!< Secure R/W, non-secure RO */
-    SC_RM_PERM_NSPRIV_RW  = 6,    /*!< Secure R/W, non-secure privilege R/W */
-    SC_RM_PERM_FULL       = 7     /*!< Full access */
-} sc_rm_perm_t;
+typedef uint8_t sc_rm_perm_t;
 
 /* Functions */
 
@@ -135,7 +143,8 @@ typedef enum sc_rm_perm_e
  * in what functions it can call, especially those associated with managing partitions.
  */
 sc_err_t sc_rm_partition_alloc(sc_ipc_t ipc, sc_rm_pt_t *pt, bool secure,
-    bool isolated, bool restricted, bool confidential, bool coherent);
+			       bool isolated, bool restricted,
+			       bool confidential, bool coherent);
 
 /*!
  * This function frees a partition and assigns all resources to the caller.
@@ -188,8 +197,7 @@ sc_rm_did_t sc_rm_get_did(sc_ipc_t ipc);
  * Assumes no assigned resources or memory regions yet! The number of static
  * DID is fixed by the SC at boot.
  */
-sc_err_t sc_rm_partition_static(sc_ipc_t ipc, sc_rm_pt_t pt,
-    sc_rm_did_t did);
+sc_err_t sc_rm_partition_static(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_did_t did);
 
 /*!
  * This function locks a partition.
@@ -234,8 +242,7 @@ sc_err_t sc_rm_get_partition(sc_ipc_t ipc, sc_rm_pt_t *pt);
  * - SC_ERR_NOACCESS if caller's partition is not the parent of \a pt,
  * - SC_ERR_LOCKED if either partition is locked
  */
-sc_err_t sc_rm_set_parent(sc_ipc_t ipc, sc_rm_pt_t pt,
-    sc_rm_pt_t pt_parent);
+sc_err_t sc_rm_set_parent(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_pt_t pt_parent);
 
 /*!
  * This function moves all movable resources/pads owned by a source partition
@@ -284,7 +291,12 @@ sc_err_t sc_rm_move_all(sc_ipc_t ipc, sc_rm_pt_t pt_src, sc_rm_pt_t pt_dst,
  *
  * @return Returns an error code (SC_ERR_NONE = success).
  *
- * Note a master will defaulted to SMMU bypass.
+ * This action resets the resource's master and peripheral attributes.
+ * Privilege attribute will be PASSTHRU, security attribute will be
+ * ASSERT if the partition si secure and NEGATE if it is not, and
+ * masters will defaulted to SMMU bypass. Access permissions will reset
+ * to SEC_RW for the owning partition only for secure partitions, FULL for
+ * non-secure. DEfault is no access by other partitions.
  *
  * Return errors:
  * - SC_ERR_NOACCESS if caller's partition is restricted,
@@ -293,8 +305,7 @@ sc_err_t sc_rm_move_all(sc_ipc_t ipc, sc_rm_pt_t pt_src, sc_rm_pt_t pt_dst,
  *   of the owner,
  * - SC_ERR_LOCKED if the owning partition or \a pt is locked
  */
-sc_err_t sc_rm_assign_resource(sc_ipc_t ipc, sc_rm_pt_t pt,
-    sc_rsrc_t resource);
+sc_err_t sc_rm_assign_resource(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rsrc_t resource);
 
 /*!
  * This function flags resources as movable or not.
@@ -320,6 +331,25 @@ sc_err_t sc_rm_set_resource_movable(sc_ipc_t ipc, sc_rsrc_t resource_fst,
     sc_rsrc_t resource_lst, bool movable);
 
 /*!
+ * This function flags all of a subsystem's resources as movable
+ * or not.
+ *
+ * @param[in]     ipc         IPC handle
+ * @param[in]     resource    resource to use to identify subsystem
+ * @param[in]     movable     movable flag (true) is movable
+ *
+ * @return Returns an error code (SC_ERR_NONE = success).
+ *
+ * Return errors:
+ * - SC_ERR_PARM if a function argument is out of range
+ *
+ * Note \a resource is used to find the associated subsystem. Only
+ * resources owned by the caller are set.
+ */
+sc_err_t sc_rm_set_subsys_rsrc_movable(sc_ipc_t ipc, sc_rsrc_t resource,
+				       bool movable);
+
+/*!
  * This function sets attributes for a resource which is a bus master (i.e.
  * capable of DMA).
  *
@@ -342,7 +372,8 @@ sc_err_t sc_rm_set_resource_movable(sc_ipc_t ipc, sc_rsrc_t resource_fst,
  * changed if the caller's partition is secure.
  */
 sc_err_t sc_rm_set_master_attributes(sc_ipc_t ipc, sc_rsrc_t resource,
-    sc_rm_spa_t sa, sc_rm_spa_t pa, bool smmu_bypass);
+				     sc_rm_spa_t sa, sc_rm_spa_t pa,
+				     bool smmu_bypass);
 
 /*!
  * This function sets the StreamID for a resource which is a bus master (i.e.
@@ -478,6 +509,34 @@ sc_err_t sc_rm_memreg_alloc(sc_ipc_t ipc, sc_rm_mr_t *mr,
     sc_faddr_t addr_start, sc_faddr_t addr_end);
 
 /*!
+ * This function requests that the SC split a memory region.
+ *
+ * @param[in]     ipc         IPC handle
+ * @param[in]     mr          handle of memory region to split
+ * @param[out]    mr_ret      return handle for new region; used for
+ *                            subsequent function calls
+ *                            associated with this region
+ * @param[in]     addr_start  start address of region (physical)
+ * @param[in]     addr_end    end address of region (physical)
+ *
+ * @return Returns an error code (SC_ERR_NONE = success).
+ *
+ * Return errors:
+ * - SC_ERR_PARM if the new memory region is not start/end part of mr,
+ * - SC_ERR_LOCKED if caller's partition is locked,
+ * - SC_ERR_PARM if the new memory region spans multiple existing regions,
+ * - SC_ERR_NOACCESS if caller's partition does not own the memory containing
+ *   the new region,
+ * - SC_ERR_UNAVAILABLE if memory region table is full (no more allocation
+ *   space)
+ *
+ * Note the new region must start or end on the split region.
+ */
+sc_err_t sc_rm_memreg_split(sc_ipc_t ipc, sc_rm_mr_t mr,
+			    sc_rm_mr_t *mr_ret, sc_faddr_t addr_start,
+			    sc_faddr_t addr_end);
+
+/*!
  * This function frees a memory region.
  *
  * @param[in]     ipc         IPC handle
@@ -493,6 +552,32 @@ sc_err_t sc_rm_memreg_alloc(sc_ipc_t ipc, sc_rm_mr_t *mr,
 sc_err_t sc_rm_memreg_free(sc_ipc_t ipc, sc_rm_mr_t mr);
 
 /*!
+ * Internal SC function to find a memory region.
+ *
+ * @see sc_rm_find_memreg().
+ */
+/*!
+ * This function finds a memory region.
+ *
+ * @param[in]     ipc         IPC handle
+ * @param[out]    mr          return handle for region; used for
+ *                            subsequent function calls
+ *                            associated with this region
+ * @param[in]     addr_start  start address of region to search for
+ * @param[in]     addr_end    end address of region to search for
+ *
+ * @return Returns an error code (SC_ERR_NONE = success).
+ *
+ * Return errors:
+ * - SC_ERR_NOTFOUND if region not found,
+ *
+ * Searches only for regions owned by the caller. Finds first
+ * region containing the range specified.
+ */
+sc_err_t sc_rm_find_memreg(sc_ipc_t ipc, sc_rm_mr_t *mr,
+			   sc_faddr_t addr_start, sc_faddr_t addr_end);
+
+/*!
  * This function assigns ownership of a memory region.
  *
  * @param[in]     ipc         IPC handle
@@ -626,7 +711,20 @@ bool sc_rm_is_pad_owned(sc_ipc_t ipc, sc_pad_t pad);
 
 /* @} */
 
+/*!
+ * @name Debug Functions
+ * @{
+ */
+
+/*!
+ * This function dumps the RM state for debug.
+ *
+ * @param[in]     ipc         IPC handle
+ */
+void sc_rm_dump(sc_ipc_t ipc);
+
+/* @} */
+
 #endif /* _SC_RM_API_H */
 
 /**@}*/
-