summaryrefslogtreecommitdiff
path: root/plat/freescale/common/imx8_topology.c
diff options
context:
space:
mode:
authorAnson Huang <Anson.Huang@nxp.com>2017-03-14 05:49:29 +0800
committerAnson Huang <Anson.Huang@nxp.com>2017-07-12 23:17:20 +0800
commitcab6ab815bb8863f853538bab7a8e6214aef5b68 (patch)
treec9fb2419a85ca17b8ef37d578cbebcd8bf0e2d40 /plat/freescale/common/imx8_topology.c
parenta9432ab983c1382e4d14e820ee34030475298ef9 (diff)
Add i.MX8 SoCs support
This patch adds i.MX8 SoCs ATFW support, including below basic features: * LPUART * SCFW RPC * SMP boot up Each SoC will have its own platform definition and driver to support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Bai Ping <ping.bai@nxp.com>
Diffstat (limited to 'plat/freescale/common/imx8_topology.c')
-rw-r--r--plat/freescale/common/imx8_topology.c59
1 files changed, 59 insertions, 0 deletions
diff --git a/plat/freescale/common/imx8_topology.c b/plat/freescale/common/imx8_topology.c
new file mode 100644
index 00000000..ce45d12a
--- /dev/null
+++ b/plat/freescale/common/imx8_topology.c
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * Neither the name of ARM nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <arch.h>
+#include <arch_helpers.h>
+#include <platform.h>
+
+extern const unsigned char imx_power_domain_tree_desc[];
+
+const unsigned char *plat_get_power_domain_tree_desc(void)
+{
+ return imx_power_domain_tree_desc;
+}
+
+int plat_core_pos_by_mpidr(u_register_t mpidr)
+{
+ unsigned int cluster_id, cpu_id;
+
+ mpidr &= MPIDR_AFFINITY_MASK;
+
+ if(mpidr & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK))
+ return -1;
+
+ cluster_id = MPIDR_AFFLVL1_VAL(mpidr);
+ cpu_id = MPIDR_AFFLVL0_VAL(mpidr);
+
+ if (cluster_id > PLATFORM_CLUSTER_COUNT ||
+ cpu_id > PLATFORM_MAX_CPU_PER_CLUSTER)
+ return -1;
+
+ return (cpu_id + (cluster_id * 4));
+}