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| author | Soby Mathew <soby.mathew@arm.com> | 2018-10-03 15:36:37 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-10-03 15:36:37 +0100 |
| commit | 3ed87a496adb58605c4ea89c03688b6a08c5f0b0 (patch) | |
| tree | 23bf112f61b4056ca93789607f1f2b22920b6b4f /plat/common | |
| parent | a4277cda5c7f57a7205f4c29edbb488d518c29b5 (diff) | |
| parent | a08a2014300a495381cdb8f6d59523bcd5d3b883 (diff) | |
Merge pull request #1584 from danielboulby-arm/db/Switches
Ensure the flow through switch statements is clear
Diffstat (limited to 'plat/common')
| -rw-r--r-- | plat/common/plat_gicv2.c | 4 | ||||
| -rw-r--r-- | plat/common/plat_gicv3.c | 4 |
2 files changed, 5 insertions, 3 deletions
diff --git a/plat/common/plat_gicv2.c b/plat/common/plat_gicv2.c index 2b61834b..4b668737 100644 --- a/plat/common/plat_gicv2.c +++ b/plat/common/plat_gicv2.c @@ -226,7 +226,7 @@ void plat_ic_set_interrupt_type(unsigned int id, unsigned int type) gicv2_type = GICV2_INTR_GROUP1; break; default: - assert(false); + assert(0); /* Unreachable */ break; } @@ -266,7 +266,7 @@ void plat_ic_set_spi_routing(unsigned int id, unsigned int routing_mode, proc_num = -1; break; default: - assert(false); + assert(0); /* Unreachable */ break; } diff --git a/plat/common/plat_gicv3.c b/plat/common/plat_gicv3.c index e43a3550..f8277fe5 100644 --- a/plat/common/plat_gicv3.c +++ b/plat/common/plat_gicv3.c @@ -157,6 +157,7 @@ uint32_t plat_interrupt_type_to_line(uint32_t type, return __builtin_ctz(SCR_IRQ_BIT); else return __builtin_ctz(SCR_FIQ_BIT); + assert(0); /* Unreachable */ case INTR_TYPE_NS: /* * The Non secure interrupts will be signaled as FIQ in S-EL0/1 @@ -166,6 +167,7 @@ uint32_t plat_interrupt_type_to_line(uint32_t type, return __builtin_ctz(SCR_FIQ_BIT); else return __builtin_ctz(SCR_IRQ_BIT); + assert(0); /* Unreachable */ case INTR_TYPE_EL3: /* * The EL3 interrupts are signaled as FIQ in both S-EL0/1 and @@ -255,7 +257,7 @@ void plat_ic_set_spi_routing(unsigned int id, unsigned int routing_mode, irm = GICV3_IRM_ANY; break; default: - assert(false); + assert(0); /* Unreachable */ break; } |