summaryrefslogtreecommitdiff
path: root/plat/arm
diff options
context:
space:
mode:
authorJohn Tsichritzis <john.tsichritzis@arm.com>2019-06-03 13:54:30 +0100
committerJohn Tsichritzis <john.tsichritzis@arm.com>2019-06-04 14:08:55 +0100
commit629d04f53045e5fa104dde4746996e4e974b97e9 (patch)
treeae1e309e32308d18e78736bbf9b3670b3b97f520 /plat/arm
parentc9e40ec59eeebb7e7d5c77ca052c1d1eb8ece511 (diff)
Apply compile-time check for AArch64-only cores
Some cores support only AArch64 mode. In those cores, only a limited subset of the AArch32 system registers are implemented. Hence, if TF-A is supposed to run on AArch64-only cores, it must be compiled with CTX_INCLUDE_AARCH32_REGS=0. Currently, the default settings for compiling TF-A are with the AArch32 system registers included. So, if we compile TF-A the default way and attempt to run it on an AArch64-only core, we only get a runtime panic. Now a compile-time check has been added to ensure that this flag has the appropriate value when AArch64-only cores are included in the build. Change-Id: I298ec550037fafc9347baafb056926d149197d4c Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
Diffstat (limited to 'plat/arm')
-rw-r--r--plat/arm/board/fvp/platform.mk25
1 files changed, 15 insertions, 10 deletions
diff --git a/plat/arm/board/fvp/platform.mk b/plat/arm/board/fvp/platform.mk
index dbc5c21b..3cbdfbc4 100644
--- a/plat/arm/board/fvp/platform.mk
+++ b/plat/arm/board/fvp/platform.mk
@@ -96,8 +96,8 @@ FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S
ifeq (${ARCH}, aarch64)
-# select a different set of CPU files, depending on whether we compile with
-# hardware assisted coherency configurations or not
+# select a different set of CPU files, depending on whether we compile for
+# hardware assisted coherency cores or not
ifeq (${HW_ASSISTED_COHERENCY}, 0)
FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \
lib/cpus/aarch64/cortex_a53.S \
@@ -105,14 +105,19 @@ ifeq (${HW_ASSISTED_COHERENCY}, 0)
lib/cpus/aarch64/cortex_a72.S \
lib/cpus/aarch64/cortex_a73.S
else
- FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \
- lib/cpus/aarch64/cortex_a75.S \
- lib/cpus/aarch64/cortex_a76.S \
- lib/cpus/aarch64/cortex_a76ae.S \
- lib/cpus/aarch64/neoverse_n1.S \
- lib/cpus/aarch64/neoverse_e1.S \
- lib/cpus/aarch64/cortex_deimos.S \
- lib/cpus/aarch64/neoverse_zeus.S
+ # AArch64-only cores
+ ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0)
+ FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a76.S \
+ lib/cpus/aarch64/cortex_a76ae.S \
+ lib/cpus/aarch64/neoverse_n1.S \
+ lib/cpus/aarch64/neoverse_e1.S \
+ lib/cpus/aarch64/cortex_deimos.S \
+ lib/cpus/aarch64/neoverse_zeus.S
+ # AArch64/AArch32
+ else
+ FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \
+ lib/cpus/aarch64/cortex_a75.S
+ endif
endif
else