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authorSoby Mathew <soby.mathew@arm.com>2019-10-03 10:22:06 +0000
committerTrustedFirmware Code Review <review@review.trustedfirmware.org>2019-10-03 10:22:06 +0000
commit251b2643fc932a776466881d79f144daa5e905ad (patch)
treef2696dade90cd98c32170d8bfa8149eed3c0bceb /plat/arm
parentb81167d318f944d0687860e527c9869977b79515 (diff)
parent59ffec157ca8d675165f122c901c1ff198a810bc (diff)
Merge "a5ds: Add handler for when user tries to switch off secondary cores" into integration
Diffstat (limited to 'plat/arm')
-rw-r--r--plat/arm/board/a5ds/a5ds_pm.c16
1 files changed, 15 insertions, 1 deletions
diff --git a/plat/arm/board/a5ds/a5ds_pm.c b/plat/arm/board/a5ds/a5ds_pm.c
index 98de77d1..cc734b00 100644
--- a/plat/arm/board/a5ds/a5ds_pm.c
+++ b/plat/arm/board/a5ds/a5ds_pm.c
@@ -3,6 +3,7 @@
*
* SPDX-License-Identifier: BSD-3-Clause
*/
+#include <assert.h>
#include <lib/psci/psci.h>
#include <plat/arm/common/plat_arm.h>
@@ -40,6 +41,18 @@ void a5ds_pwr_domain_on_finish(const psci_power_state_t *target_state)
}
/*******************************************************************************
+ * Platform handler called when a power domain is about to be turned off. The
+ * target_state encodes the power state that each level should transition to.
+ * a5ds only has always-on power domain and there is no power control present.
+ ******************************************************************************/
+void a5ds_pwr_domain_off(const psci_power_state_t *target_state)
+{
+ ERROR("CPU_OFF not supported on this platform\n");
+ assert(false);
+ panic();
+}
+
+/*******************************************************************************
* Export the platform handlers via a5ds_psci_pm_ops. The ARM Standard
* platform layer will take care of registering the handlers with PSCI.
******************************************************************************/
@@ -47,7 +60,8 @@ plat_psci_ops_t a5ds_psci_pm_ops = {
/* dummy struct */
.validate_ns_entrypoint = NULL,
.pwr_domain_on = a5ds_pwr_domain_on,
- .pwr_domain_on_finish = a5ds_pwr_domain_on_finish
+ .pwr_domain_on_finish = a5ds_pwr_domain_on_finish,
+ .pwr_domain_off = a5ds_pwr_domain_off
};
int __init plat_setup_psci_ops(uintptr_t sec_entrypoint,