diff options
| author | Dimitris Papastamos <dimitris.papastamos@arm.com> | 2017-06-19 15:54:58 +0100 |
|---|---|---|
| committer | Dimitris Papastamos <dimitris.papastamos@arm.com> | 2017-06-20 15:14:01 +0100 |
| commit | c971143235f2db9b0ab7c9480cdca6963ac15c65 (patch) | |
| tree | 0d8e020e203b1c62c42aa6a94e25249a72dcb7a6 /plat/arm | |
| parent | f9688f27551e938ae5d992f7859a9950a169b706 (diff) | |
juno: Fix AArch32 build
Commit 6de8b24f52cf2bd74adefbaa86dd2a0676c3eaa2 broke Juno AArch32
build.
Change-Id: Ied70d9becb86e53ccb46a2e3245e2a551d1bf701
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
Diffstat (limited to 'plat/arm')
| -rw-r--r-- | plat/arm/board/juno/aarch32/juno_helpers.S | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/plat/arm/board/juno/aarch32/juno_helpers.S b/plat/arm/board/juno/aarch32/juno_helpers.S index 5044a240..824002ae 100644 --- a/plat/arm/board/juno/aarch32/juno_helpers.S +++ b/plat/arm/board/juno/aarch32/juno_helpers.S @@ -81,9 +81,9 @@ func JUNO_HANDLER(0) * Cortex-A57 specific settings * -------------------------------------------------------------------- */ - mov r0, #((L2_DATA_RAM_LATENCY_3_CYCLES << L2CTLR_DATA_RAM_LATENCY_SHIFT) | \ - (L2_TAG_RAM_LATENCY_3_CYCLES << L2CTLR_TAG_RAM_LATENCY_SHIFT)) - stcopr r0, L2CTLR + mov r0, #((CORTEX_A57_L2_DATA_RAM_LATENCY_3_CYCLES << CORTEX_A57_L2CTLR_DATA_RAM_LATENCY_SHIFT) | \ + (CORTEX_A57_L2_TAG_RAM_LATENCY_3_CYCLES << CORTEX_A57_L2CTLR_TAG_RAM_LATENCY_SHIFT)) + stcopr r0, CORTEX_A57_L2CTLR 1: isb bx lr @@ -118,8 +118,8 @@ A57: * Cortex-A57 specific settings * -------------------------------------------------------------------- */ - mov r0, #(L2_DATA_RAM_LATENCY_3_CYCLES << L2CTLR_DATA_RAM_LATENCY_SHIFT) - stcopr r0, L2CTLR + mov r0, #(CORTEX_A57_L2_DATA_RAM_LATENCY_3_CYCLES << CORTEX_A57_L2CTLR_DATA_RAM_LATENCY_SHIFT) + stcopr r0, CORTEX_A57_L2CTLR isb bx lr endfunc JUNO_HANDLER(1) @@ -152,9 +152,9 @@ A72: * Cortex-A72 specific settings * -------------------------------------------------------------------- */ - mov r0, #((L2_DATA_RAM_LATENCY_3_CYCLES << L2CTLR_DATA_RAM_LATENCY_SHIFT) | \ - (L2_TAG_RAM_LATENCY_2_CYCLES << L2CTLR_TAG_RAM_LATENCY_SHIFT)) - stcopr r0, L2CTLR + mov r0, #((CORTEX_A72_L2_DATA_RAM_LATENCY_3_CYCLES << CORTEX_A72_L2CTLR_DATA_RAM_LATENCY_SHIFT) | \ + (CORTEX_A72_L2_TAG_RAM_LATENCY_2_CYCLES << CORTEX_A72_L2CTLR_TAG_RAM_LATENCY_SHIFT)) + stcopr r0, CORTEX_A72_L2CTLR isb bx lr endfunc JUNO_HANDLER(2) |