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authorMasahiro Yamada <yamada.masahiro@socionext.com>2016-12-28 16:11:41 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2017-01-18 19:33:41 +0900
commit474970535552b1e28b33461429b5492a1f1dd7cd (patch)
tree85c85f59bc891864b2b584213bffff755fdc01d8 /plat/arm
parentecdc898da3f3c01a4034d875219c61357832c12c (diff)
Move BL_COHERENT_RAM_BASE/END defines to common_def.h
We have lots of duplicated defines (and comment blocks too). Move them to include/plat/common/common_def.h. While we are here, suffix the end address with _END instead of _LIMIT. The _END is a better fit to indicate the linker-derived real end address. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'plat/arm')
-rw-r--r--plat/arm/common/arm_bl1_setup.c18
-rw-r--r--plat/arm/common/arm_bl2_setup.c16
-rw-r--r--plat/arm/common/arm_bl2u_setup.c16
-rw-r--r--plat/arm/common/arm_bl31_setup.c16
-rw-r--r--plat/arm/common/sp_min/arm_sp_min_setup.c17
-rw-r--r--plat/arm/common/tsp/arm_tsp_setup.c17
6 files changed, 12 insertions, 88 deletions
diff --git a/plat/arm/common/arm_bl1_setup.c b/plat/arm/common/arm_bl1_setup.c
index 91809fb4..81a87c44 100644
--- a/plat/arm/common/arm_bl1_setup.c
+++ b/plat/arm/common/arm_bl1_setup.c
@@ -39,20 +39,6 @@
#include <xlat_tables.h>
#include "../../../bl1/bl1_private.h"
-
-#if USE_COHERENT_MEM
-/*
- * The next 2 constants identify the extents of the coherent memory region.
- * These addresses are used by the MMU setup code and therefore they must be
- * page-aligned. It is the responsibility of the linker script to ensure that
- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
- * page-aligned addresses.
- */
-#define BL1_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
-#define BL1_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
-#endif
-
-
/* Weak definitions may be overridden in specific ARM standard platform */
#pragma weak bl1_early_platform_setup
#pragma weak bl1_plat_arch_setup
@@ -128,8 +114,8 @@ void arm_bl1_plat_arch_setup(void)
BL1_RO_DATA_BASE,
BL1_RO_DATA_END
#if USE_COHERENT_MEM
- , BL1_COHERENT_RAM_BASE,
- BL1_COHERENT_RAM_LIMIT
+ , BL_COHERENT_RAM_BASE,
+ BL_COHERENT_RAM_END
#endif
);
#ifdef AARCH32
diff --git a/plat/arm/common/arm_bl2_setup.c b/plat/arm/common/arm_bl2_setup.c
index 293e5e51..5f307080 100644
--- a/plat/arm/common/arm_bl2_setup.c
+++ b/plat/arm/common/arm_bl2_setup.c
@@ -39,18 +39,6 @@
#include <platform_def.h>
#include <string.h>
-#if USE_COHERENT_MEM
-/*
- * The next 2 constants identify the extents of the coherent memory region.
- * These addresses are used by the MMU setup code and therefore they must be
- * page-aligned. It is the responsibility of the linker script to ensure that
- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
- * page-aligned addresses.
- */
-#define BL2_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
-#define BL2_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
-#endif
-
/* Data structure which holds the extents of the trusted SRAM for BL2 */
static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
@@ -242,8 +230,8 @@ void arm_bl2_plat_arch_setup(void)
BL_RO_DATA_BASE,
BL_RO_DATA_END
#if USE_COHERENT_MEM
- , BL2_COHERENT_RAM_BASE,
- BL2_COHERENT_RAM_LIMIT
+ , BL_COHERENT_RAM_BASE,
+ BL_COHERENT_RAM_END
#endif
);
diff --git a/plat/arm/common/arm_bl2u_setup.c b/plat/arm/common/arm_bl2u_setup.c
index cad42f07..86317f65 100644
--- a/plat/arm/common/arm_bl2u_setup.c
+++ b/plat/arm/common/arm_bl2u_setup.c
@@ -36,18 +36,6 @@
#include <plat_arm.h>
#include <string.h>
-#if USE_COHERENT_MEM
-/*
- * The next 2 constants identify the extents of the coherent memory region.
- * These addresses are used by the MMU setup code and therefore they must be
- * page-aligned. It is the responsibility of the linker script to ensure that
- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
- * page-aligned addresses.
- */
-#define BL2U_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
-#define BL2U_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
-#endif
-
/* Weak definitions may be overridden in specific ARM standard platform */
#pragma weak bl2u_platform_setup
#pragma weak bl2u_early_platform_setup
@@ -100,8 +88,8 @@ void arm_bl2u_plat_arch_setup(void)
BL_RO_DATA_END
#if USE_COHERENT_MEM
,
- BL2U_COHERENT_RAM_BASE,
- BL2U_COHERENT_RAM_LIMIT
+ BL_COHERENT_RAM_BASE,
+ BL_COHERENT_RAM_END
#endif
);
enable_mmu_el1(0);
diff --git a/plat/arm/common/arm_bl31_setup.c b/plat/arm/common/arm_bl31_setup.c
index 6b6bae89..d20d8cdd 100644
--- a/plat/arm/common/arm_bl31_setup.c
+++ b/plat/arm/common/arm_bl31_setup.c
@@ -41,18 +41,6 @@
#define BL31_END (uintptr_t)(&__BL31_END__)
-#if USE_COHERENT_MEM
-/*
- * The next 2 constants identify the extents of the coherent memory region.
- * These addresses are used by the MMU setup code and therefore they must be
- * page-aligned. It is the responsibility of the linker script to ensure that
- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols
- * refer to page-aligned addresses.
- */
-#define BL31_COHERENT_RAM_BASE (uintptr_t)(&__COHERENT_RAM_START__)
-#define BL31_COHERENT_RAM_LIMIT (uintptr_t)(&__COHERENT_RAM_END__)
-#endif
-
/*
* Placeholder variables for copying the arguments that have been passed to
* BL31 from BL2.
@@ -292,8 +280,8 @@ void arm_bl31_plat_arch_setup(void)
BL_RO_DATA_BASE,
BL_RO_DATA_END
#if USE_COHERENT_MEM
- , BL31_COHERENT_RAM_BASE,
- BL31_COHERENT_RAM_LIMIT
+ , BL_COHERENT_RAM_BASE,
+ BL_COHERENT_RAM_END
#endif
);
enable_mmu_el3(0);
diff --git a/plat/arm/common/sp_min/arm_sp_min_setup.c b/plat/arm/common/sp_min/arm_sp_min_setup.c
index 40155f4e..a472ceb9 100644
--- a/plat/arm/common/sp_min/arm_sp_min_setup.c
+++ b/plat/arm/common/sp_min/arm_sp_min_setup.c
@@ -39,19 +39,6 @@
#define BL32_END (uintptr_t)(&__BL32_END__)
-#if USE_COHERENT_MEM
-/*
- * The next 2 constants identify the extents of the coherent memory region.
- * These addresses are used by the MMU setup code and therefore they must be
- * page-aligned. It is the responsibility of the linker script to ensure that
- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
- * page-aligned addresses.
- */
-#define BL32_COHERENT_RAM_BASE (uintptr_t)(&__COHERENT_RAM_START__)
-#define BL32_COHERENT_RAM_LIMIT (uintptr_t)(&__COHERENT_RAM_END__)
-#endif
-
-
static entry_point_info_t bl33_image_ep_info;
/* Weak definitions may be overridden in specific ARM standard platform */
@@ -206,8 +193,8 @@ void sp_min_plat_arch_setup(void)
BL_RO_DATA_BASE,
BL_RO_DATA_END
#if USE_COHERENT_MEM
- , BL32_COHERENT_RAM_BASE,
- BL32_COHERENT_RAM_LIMIT
+ , BL_COHERENT_RAM_BASE,
+ BL_COHERENT_RAM_END
#endif
);
diff --git a/plat/arm/common/tsp/arm_tsp_setup.c b/plat/arm/common/tsp/arm_tsp_setup.c
index 58c2b7ba..20533ac0 100644
--- a/plat/arm/common/tsp/arm_tsp_setup.c
+++ b/plat/arm/common/tsp/arm_tsp_setup.c
@@ -37,19 +37,6 @@
#define BL32_END (unsigned long)(&__BL32_END__)
-#if USE_COHERENT_MEM
-/*
- * The next 2 constants identify the extents of the coherent memory region.
- * These addresses are used by the MMU setup code and therefore they must be
- * page-aligned. It is the responsibility of the linker script to ensure that
- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
- * page-aligned addresses.
- */
-#define BL32_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
-#define BL32_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
-#endif
-
-
/* Weak definitions may be overridden in specific ARM standard platform */
#pragma weak tsp_early_platform_setup
#pragma weak tsp_platform_setup
@@ -95,8 +82,8 @@ void tsp_plat_arch_setup(void)
BL_RO_DATA_BASE,
BL_RO_DATA_END
#if USE_COHERENT_MEM
- , BL32_COHERENT_RAM_BASE,
- BL32_COHERENT_RAM_LIMIT
+ , BL_COHERENT_RAM_BASE,
+ BL_COHERENT_RAM_END
#endif
);
enable_mmu_el1(0);