diff options
| author | David Wang <david.wang@arm.com> | 2016-06-07 09:22:40 +0800 |
|---|---|---|
| committer | David Wang <david.wang@arm.com> | 2016-06-08 17:20:20 +0800 |
| commit | 68b105ae4794fa4f37392d17a0c898478d2f2a8f (patch) | |
| tree | d7fd2c9aa95f20762bc94d03af0602e65e1ad359 /plat/arm/css | |
| parent | 87e7a9a557cd61c6cb50c590317d16e25fa15ade (diff) | |
CSS: Add support to wake up the core from wfi in GICv3
In GICv3 mode, the non secure group1 interrupts are signalled via the
FIQ line in EL3. To support waking up from CPU_SUSPEND to standby on
these systems, EL3 should route FIQ to EL3 temporarily before wfi and
restore the original setting after resume. This patch makes this change
for the CSS platforms in the `css_cpu_standby` psci pm ops hook.
Change-Id: Ibf3295d16e2f08da490847c1457bc839e1bac144
Diffstat (limited to 'plat/arm/css')
| -rw-r--r-- | plat/arm/css/common/css_pm.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/plat/arm/css/common/css_pm.c b/plat/arm/css/common/css_pm.c index b6f94ac2..801d9375 100644 --- a/plat/arm/css/common/css_pm.c +++ b/plat/arm/css/common/css_pm.c @@ -262,8 +262,14 @@ void css_cpu_standby(plat_local_state_t cpu_state) assert(cpu_state == ARM_LOCAL_STATE_RET); scr = read_scr_el3(); - /* Enable PhysicalIRQ bit for NS world to wake the CPU */ - write_scr_el3(scr | SCR_IRQ_BIT); + /* + * Enable the Non secure interrupt to wake the CPU. + * In GICv3 affinity routing mode, the non secure group1 interrupts use + * the PhysicalFIQ at EL3 whereas in GICv2, it uses the PhysicalIRQ. + * Enabling both the bits works for both GICv2 mode and GICv3 affinity + * routing mode. + */ + write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT); isb(); dsb(); wfi(); |