diff options
| author | Andre Przywara <andre.przywara@arm.com> | 2018-09-09 00:38:19 +0100 |
|---|---|---|
| committer | Andre Przywara <andre.przywara@arm.com> | 2018-09-17 09:51:22 +0100 |
| commit | 1a910bcee2444842de58a3b748a942fe0f183d67 (patch) | |
| tree | 842bda6e36cb6db2b78db302fdacb2239299fab3 /plat/allwinner | |
| parent | e52ed092cde21d13533df32eb68629a980d69b4b (diff) | |
allwinner: sun50i_h6: improve I2C setup
Drop the unnecessary check for the I2C pins being already configured as
I2C pins (we actually don't care).
Also avoid resetting *every* peripheral that is covered by the PRCM reset
controller, instead just clear the one line connected to the I2C controller.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'plat/allwinner')
| -rw-r--r-- | plat/allwinner/sun50i_h6/sunxi_power.c | 15 |
1 files changed, 4 insertions, 11 deletions
diff --git a/plat/allwinner/sun50i_h6/sunxi_power.c b/plat/allwinner/sun50i_h6/sunxi_power.c index f109ccec..b6e07a24 100644 --- a/plat/allwinner/sun50i_h6/sunxi_power.c +++ b/plat/allwinner/sun50i_h6/sunxi_power.c @@ -28,13 +28,8 @@ static int sunxi_init_r_i2c(void) { uint32_t reg; - /* get currently configured function for pins PL0 and PL1 */ - reg = mmio_read_32(SUNXI_R_PIO_BASE + 0x00); - if ((reg & 0xff) == 0x33) { - NOTICE("PMIC: already configured for TWI\n"); - } - /* switch pins PL0 and PL1 to I2C */ + reg = mmio_read_32(SUNXI_R_PIO_BASE + 0x00); mmio_write_32(SUNXI_R_PIO_BASE + 0x00, (reg & ~0xff) | 0x33); /* level 2 drive strength */ @@ -47,13 +42,11 @@ static int sunxi_init_r_i2c(void) /* assert & de-assert reset of R_I2C */ reg = mmio_read_32(SUNXI_R_PRCM_BASE + 0x19c); - mmio_write_32(SUNXI_R_PRCM_BASE + 0x19c, 0); - reg = mmio_read_32(SUNXI_R_PRCM_BASE + 0x19c); - mmio_write_32(SUNXI_R_PRCM_BASE + 0x19c, reg | 0x00010000); + mmio_write_32(SUNXI_R_PRCM_BASE + 0x19c, reg & ~BIT(16)); + mmio_write_32(SUNXI_R_PRCM_BASE + 0x19c, reg | BIT(16)); /* un-gate R_I2C clock */ - reg = mmio_read_32(SUNXI_R_PRCM_BASE + 0x19c); - mmio_write_32(SUNXI_R_PRCM_BASE + 0x19c, reg | 0x00000001); + mmio_write_32(SUNXI_R_PRCM_BASE + 0x19c, reg | BIT(16) | BIT(0)); /* call mi2cv driver */ i2c_init((void *)SUNXI_R_I2C_BASE); |