diff options
| author | Louis Mayencourt <louis.mayencourt@arm.com> | 2019-06-10 16:43:39 +0100 |
|---|---|---|
| committer | Louis Mayencourt <louis.mayencourt@arm.com> | 2019-06-11 14:01:32 +0100 |
| commit | bb2f077a94b79278f0d2f954c81f4a0fdedc6d19 (patch) | |
| tree | ab5dc2b02e57d5f08eed64a7296fb324919cfb6a /lib | |
| parent | 5441ed2463ef21bb26bbbc1a48b3866039eeb85e (diff) | |
DSU: Apply erratum 936184 for Neoverse N1/E1
Change-Id: Idd08914bcb945ad6aa0621e594c95df88ee8f9c8
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/cpus/aarch64/neoverse_e1.S | 29 | ||||
| -rw-r--r-- | lib/cpus/aarch64/neoverse_n1.S | 6 |
2 files changed, 34 insertions, 1 deletions
diff --git a/lib/cpus/aarch64/neoverse_e1.S b/lib/cpus/aarch64/neoverse_e1.S index d840da84..96b63cf0 100644 --- a/lib/cpus/aarch64/neoverse_e1.S +++ b/lib/cpus/aarch64/neoverse_e1.S @@ -21,6 +21,21 @@ #error "Neoverse-E1 supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0" #endif + /* ------------------------------------------------- + * The CPU Ops reset function for Neoverse-E1. + * Shall clobber: x0-x19 + * ------------------------------------------------- + */ +func neoverse_e1_reset_func + mov x19, x30 + +#if ERRATA_DSU_936184 + bl errata_dsu_936184_wa +#endif + + ret x19 +endfunc neoverse_e1_reset_func + func neoverse_e1_cpu_pwr_dwn mrs x0, NEOVERSE_E1_CPUPWRCTLR_EL1 orr x0, x0, #NEOVERSE_E1_CPUPWRCTLR_EL1_CORE_PWRDN_BIT @@ -34,6 +49,18 @@ endfunc neoverse_e1_cpu_pwr_dwn * Errata printing function for Neoverse N1. Must follow AAPCS. */ func neoverse_e1_errata_report + stp x8, x30, [sp, #-16]! + + bl cpu_get_rev_var + mov x8, x0 + + /* + * Report all errata. The revision-variant information is passed to + * checking functions of each errata. + */ + report_errata ERRATA_DSU_936184, neoverse_e1, dsu_936184 + + ldp x8, x30, [sp], #16 ret endfunc neoverse_e1_errata_report #endif @@ -50,5 +77,5 @@ func neoverse_e1_cpu_reg_dump endfunc neoverse_e1_cpu_reg_dump declare_cpu_ops neoverse_e1, NEOVERSE_E1_MIDR, \ - CPU_NO_RESET_FUNC, \ + neoverse_e1_reset_func, \ neoverse_e1_cpu_pwr_dwn diff --git a/lib/cpus/aarch64/neoverse_n1.S b/lib/cpus/aarch64/neoverse_n1.S index d685b7e9..8afc4a28 100644 --- a/lib/cpus/aarch64/neoverse_n1.S +++ b/lib/cpus/aarch64/neoverse_n1.S @@ -146,6 +146,11 @@ func neoverse_n1_reset_func msr CPUAMCNTENSET_EL0, x0 isb #endif + +#if ERRATA_DSU_936184 + bl errata_dsu_936184_wa +#endif + ret x19 endfunc neoverse_n1_reset_func @@ -181,6 +186,7 @@ func neoverse_n1_errata_report */ report_errata ERRATA_N1_1043202, neoverse_n1, 1043202 report_errata ERRATA_N1_1315703, neoverse_n1, 1315703 + report_errata ERRATA_DSU_936184, neoverse_n1, dsu_936184 ldp x8, x30, [sp], #16 ret |