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authorSoby Mathew <soby.mathew@arm.com>2019-07-12 09:23:38 +0100
committerSoby Mathew <soby.mathew@arm.com>2019-07-12 09:27:25 +0100
commitb7e398d64cc4d5bfe279f1a50b7c7e4ea9263534 (patch)
treef863afea96c59705f84614baedc2e6ea145ffa49 /lib
parent21bde92ff6d20ef2d3a2651fd729a1579232313b (diff)
Enable MTE support unilaterally for Normal World
This patch enables MTE for Normal world if the CPU suppors it. Enabling MTE for secure world will be done later. Change-Id: I9ef64460beaba15e9a9c20ab02da4fb2208b6f7d Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Diffstat (limited to 'lib')
-rw-r--r--lib/el3_runtime/aarch64/context_mgmt.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/lib/el3_runtime/aarch64/context_mgmt.c b/lib/el3_runtime/aarch64/context_mgmt.c
index 89d7ed68..05ba5ed6 100644
--- a/lib/el3_runtime/aarch64/context_mgmt.c
+++ b/lib/el3_runtime/aarch64/context_mgmt.c
@@ -12,6 +12,7 @@
#include <arch.h>
#include <arch_helpers.h>
+#include <arch_features.h>
#include <bl31/interrupt_mgmt.h>
#include <common/bl_common.h>
#include <context.h>
@@ -136,6 +137,18 @@ void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep)
scr_el3 |= SCR_API_BIT | SCR_APK_BIT;
#endif /* !CTX_INCLUDE_PAUTH_REGS */
+ unsigned int mte = get_armv8_5_mte_support();
+
+ /*
+ * Enable MTE support unilaterally for normal world if the CPU supports
+ * it.
+ */
+ if (mte != MTE_UNIMPLEMENTED) {
+ if (security_state == NON_SECURE) {
+ scr_el3 |= SCR_ATA_BIT;
+ }
+ }
+
#ifdef IMAGE_BL31
/*
* SCR_EL3.IRQ, SCR_EL3.FIQ: Enable the physical FIQ and IRQ routing as