diff options
| author | laurenw-arm <lauren.wehrmeister@arm.com> | 2019-08-19 11:06:18 -0500 |
|---|---|---|
| committer | laurenw-arm <lauren.wehrmeister@arm.com> | 2019-08-19 11:06:18 -0500 |
| commit | a33ec1e75a03074ea9abcb2d0bf878da6beab5e4 (patch) | |
| tree | b5e6c339803e942aa4b7d34e3c2315cc62a143c7 /lib | |
| parent | d1b6013d8485094d948e6b6039b8d119a907ecf8 (diff) | |
Fix for N1 1043202 Errata Workaround
ISB instruction was removed from the N1 1043202 Errata Workaround [1], this
fix is adding the ISB instruction back in.
[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-466751330-10325/index.html
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I74eac7f6ad38991c36d423ad6aa44558033ad388
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/cpus/aarch64/neoverse_n1.S | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/cpus/aarch64/neoverse_n1.S b/lib/cpus/aarch64/neoverse_n1.S index b143a2e7..31e7a3a7 100644 --- a/lib/cpus/aarch64/neoverse_n1.S +++ b/lib/cpus/aarch64/neoverse_n1.S @@ -43,6 +43,7 @@ func errata_n1_1043202_wa msr CPUPMR_EL3, x0 ldr x0, =0x800200071 msr CPUPCR_EL3, x0 + isb 1: ret x17 endfunc errata_n1_1043202_wa |