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| author | Soby Mathew <soby.mathew@arm.com> | 2019-05-16 08:33:56 +0000 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2019-05-16 08:33:56 +0000 |
| commit | 482fc9c88840c7d9c74e1fa57a8e25a291cc02be (patch) | |
| tree | 1baf224d58fe4d1c4ab0f5b8d46f83bc53ccaca4 /lib | |
| parent | d8b11091b6f9032c16fdc54218ceda10d21e3355 (diff) | |
| parent | 603b372e5349ef4bfc2fbea395787d64620a73d3 (diff) | |
Merge changes from topic "sami/550_fix_n1sdp_issues_v1" into integration
* changes:
N1SDP: Initialise CNTFRQ in Non Secure CNTBaseN
N1SDP: Fix DRAM2 start address
Add option for defining platform DRAM2 base
Disable speculative loads only if SSBS is supported
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/cpus/aarch64/neoverse_n1.S | 24 |
1 files changed, 22 insertions, 2 deletions
diff --git a/lib/cpus/aarch64/neoverse_n1.S b/lib/cpus/aarch64/neoverse_n1.S index 2038f318..a0babb0e 100644 --- a/lib/cpus/aarch64/neoverse_n1.S +++ b/lib/cpus/aarch64/neoverse_n1.S @@ -49,11 +49,31 @@ func check_errata_1043202 b cpu_rev_var_ls endfunc check_errata_1043202 +/* -------------------------------------------------- + * Disable speculative loads if Neoverse N1 supports + * SSBS. + * + * Shall clobber: x0. + * -------------------------------------------------- + */ +func neoverse_n1_disable_speculative_loads + /* Check if the PE implements SSBS */ + mrs x0, id_aa64pfr1_el1 + tst x0, #(ID_AA64PFR1_EL1_SSBS_MASK << ID_AA64PFR1_EL1_SSBS_SHIFT) + b.eq 1f + + /* Disable speculative loads */ + msr SSBS, xzr + isb + +1: + ret +endfunc neoverse_n1_disable_speculative_loads + func neoverse_n1_reset_func mov x19, x30 - /* Disables speculative loads */ - msr SSBS, xzr + bl neoverse_n1_disable_speculative_loads /* Forces all cacheable atomic instructions to be near */ mrs x0, NEOVERSE_N1_CPUACTLR2_EL1 |