diff options
| author | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2017-02-21 14:40:44 +0000 |
|---|---|---|
| committer | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2017-05-02 16:11:12 +0100 |
| commit | f4c8aa905414fb021c08370306bd516f678a58bd (patch) | |
| tree | 7f727d80afb45c86cf12203e66d49bf23d5bd0b6 /lib | |
| parent | 7fa3214e18ad640208eaf6c8d6111ec53f3894aa (diff) | |
Add macro to check whether the CPU implements an EL
Replace all instances of checks with the new macro.
Change-Id: I0eec39b9376475a1a9707a3115de9d36f88f8a2a
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/el3_runtime/aarch64/context_mgmt.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/lib/el3_runtime/aarch64/context_mgmt.c b/lib/el3_runtime/aarch64/context_mgmt.c index 5cce8793..b16e55d9 100644 --- a/lib/el3_runtime/aarch64/context_mgmt.c +++ b/lib/el3_runtime/aarch64/context_mgmt.c @@ -229,8 +229,7 @@ void cm_prepare_el3_exit(uint32_t security_state) sctlr_elx &= ~SCTLR_EE_BIT; sctlr_elx |= SCTLR_EL2_RES1; write_sctlr_el2(sctlr_elx); - } else if (read_id_aa64pfr0_el1() & - (ID_AA64PFR0_ELX_MASK << ID_AA64PFR0_EL2_SHIFT)) { + } else if (EL_IMPLEMENTED(2)) { /* EL2 present but unused, need to disable safely */ /* HCR_EL2 = 0, except RW bit set to match SCR_EL3 */ |