diff options
| author | Antonio Nino Diaz <antonio.ninodiaz@arm.com> | 2019-01-11 11:20:10 +0000 |
|---|---|---|
| committer | Antonio Nino Diaz <antonio.ninodiaz@arm.com> | 2019-01-11 11:20:10 +0000 |
| commit | 2559b2c8256f798e7e9fc9eef58257b13b9e8514 (patch) | |
| tree | ab1e11bffe4bc1d0acaa536595f03f63e7f09e7b /lib/xlat_tables_v2 | |
| parent | 300afb387ea3ce588a9b4c6746316bf9bc55dd56 (diff) | |
xlat v2: Dynamically detect need for CnP bit
ARMv8.2-TTCNP is mandatory from ARMv8.2 onwards, but it can be implemented
in CPUs that don't implement all mandatory 8.2 features (and so have to
claim to be a lower version).
This patch removes usage of the ARM_ARCH_AT_LEAST() macro and uses system
ID registers to detect whether it is needed to set the bit or not.
Change-Id: I7bcbf0c7c937590dfc2ca668cfd9267c50f7d52c
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Diffstat (limited to 'lib/xlat_tables_v2')
| -rw-r--r-- | lib/xlat_tables_v2/aarch32/xlat_tables_arch.c | 14 | ||||
| -rw-r--r-- | lib/xlat_tables_v2/aarch64/xlat_tables_arch.c | 14 |
2 files changed, 12 insertions, 16 deletions
diff --git a/lib/xlat_tables_v2/aarch32/xlat_tables_arch.c b/lib/xlat_tables_v2/aarch32/xlat_tables_arch.c index 349b6c4d..913c86d3 100644 --- a/lib/xlat_tables_v2/aarch32/xlat_tables_arch.c +++ b/lib/xlat_tables_v2/aarch32/xlat_tables_arch.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -10,6 +10,7 @@ #include <platform_def.h> #include <arch.h> +#include <arch_features.h> #include <arch_helpers.h> #include <lib/cassert.h> #include <lib/utils_def.h> @@ -219,13 +220,10 @@ void setup_mmu_cfg(uint64_t *params, unsigned int flags, /* Set TTBR0 bits as well */ ttbr0 = (uint64_t)(uintptr_t) base_table; -#if ARM_ARCH_AT_LEAST(8, 2) - /* - * Enable CnP bit so as to share page tables with all PEs. This - * is mandatory for ARMv8.2 implementations. - */ - ttbr0 |= TTBR_CNP_BIT; -#endif + if (is_armv8_2_ttcnp_present()) { + /* Enable CnP bit so as to share page tables with all PEs. */ + ttbr0 |= TTBR_CNP_BIT; + } /* Now populate MMU configuration */ params[MMU_CFG_MAIR] = mair; diff --git a/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c b/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c index a803d835..228f7514 100644 --- a/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c +++ b/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -9,6 +9,7 @@ #include <stdint.h> #include <arch.h> +#include <arch_features.h> #include <arch_helpers.h> #include <lib/cassert.h> #include <lib/utils_def.h> @@ -266,13 +267,10 @@ void setup_mmu_cfg(uint64_t *params, unsigned int flags, /* Set TTBR bits as well */ ttbr0 = (uint64_t) base_table; -#if ARM_ARCH_AT_LEAST(8, 2) - /* - * Enable CnP bit so as to share page tables with all PEs. This - * is mandatory for ARMv8.2 implementations. - */ - ttbr0 |= TTBR_CNP_BIT; -#endif + if (is_armv8_2_ttcnp_present()) { + /* Enable CnP bit so as to share page tables with all PEs. */ + ttbr0 |= TTBR_CNP_BIT; + } params[MMU_CFG_MAIR] = mair; params[MMU_CFG_TCR] = tcr; |