diff options
| author | Soby Mathew <soby.mathew@arm.com> | 2016-09-29 14:15:57 +0100 |
|---|---|---|
| committer | Soby Mathew <soby.mathew@arm.com> | 2016-10-14 09:53:22 +0100 |
| commit | b7b0787da84a79733e1ed90a1c15d588c77869e8 (patch) | |
| tree | 9440ea2cb83d4f192e5116f4b65997dce99c7134 /lib/el3_runtime | |
| parent | b314c9fa88271a5b88cdbcbfd6319405e0a4e30e (diff) | |
Unify SCTLR initialization for AArch32 normal world
The values of CP15BEN, nTWI & nTWE bits in SCTLR_EL1 are architecturally
unknown if EL3 is AARCH64 whereas they reset to 1 if EL3 is AArch32. This
might be a compatibility break for legacy AArch32 normal world software if
these bits are not set to 1 when EL3 is AArch64. This patch enables the
CP15BEN, nTWI and nTWE bits in the SCTLR_EL1 if the lower non-secure EL is
AArch32. This unifies the SCTLR settings for lower non-secure EL in AArch32
mode for both AArch64 and AArch32 builds of Trusted Firmware.
Fixes ARM-software/tf-issues#428
Change-Id: I3152d1580e4869c0ea745c5bd9da765f9c254947
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Diffstat (limited to 'lib/el3_runtime')
| -rw-r--r-- | lib/el3_runtime/aarch32/context_mgmt.c | 7 | ||||
| -rw-r--r-- | lib/el3_runtime/aarch64/context_mgmt.c | 13 |
2 files changed, 18 insertions, 2 deletions
diff --git a/lib/el3_runtime/aarch32/context_mgmt.c b/lib/el3_runtime/aarch32/context_mgmt.c index bc5f9c42..02ae2a7e 100644 --- a/lib/el3_runtime/aarch32/context_mgmt.c +++ b/lib/el3_runtime/aarch32/context_mgmt.c @@ -116,7 +116,12 @@ static void cm_init_context_common(cpu_context_t *ctx, const entry_point_info_t */ if (security_state != SECURE) { sctlr = EP_GET_EE(ep->h.attr) ? SCTLR_EE_BIT : 0; - sctlr |= SCTLR_RES1; + /* + * In addition to SCTLR_RES1, set the CP15_BEN, nTWI & nTWE + * bits that architecturally reset to 1. + */ + sctlr |= SCTLR_RES1 | SCTLR_CP15BEN_BIT | + SCTLR_NTWI_BIT | SCTLR_NTWE_BIT; write_ctx_reg(reg_ctx, CTX_NS_SCTLR, sctlr); } diff --git a/lib/el3_runtime/aarch64/context_mgmt.c b/lib/el3_runtime/aarch64/context_mgmt.c index 4527aa34..4b5d0ee5 100644 --- a/lib/el3_runtime/aarch64/context_mgmt.c +++ b/lib/el3_runtime/aarch64/context_mgmt.c @@ -143,8 +143,19 @@ static void cm_init_context_common(cpu_context_t *ctx, const entry_point_info_t sctlr_elx = EP_GET_EE(ep->h.attr) ? SCTLR_EE_BIT : 0; if (GET_RW(ep->spsr) == MODE_RW_64) sctlr_elx |= SCTLR_EL1_RES1; - else + else { sctlr_elx |= SCTLR_AARCH32_EL1_RES1; + /* + * If lower non-secure EL is AArch32, enable the CP15BEN, nTWI + * & nTWI bits. This aligns with SCTLR initialization on + * systems with an AArch32 EL3, where these bits + * architecturally reset to 1. + */ + if (security_state != SECURE) + sctlr_elx |= SCTLR_CP15BEN_BIT | SCTLR_NTWI_BIT + | SCTLR_NTWE_BIT; + } + write_ctx_reg(get_sysregs_ctx(ctx), CTX_SCTLR_EL1, sctlr_elx); if ((GET_RW(ep->spsr) == MODE_RW_64 |