diff options
| author | Joel Hutton <Joel.Hutton@arm.com> | 2019-04-10 12:52:52 +0100 |
|---|---|---|
| committer | Joel Hutton <Joel.Hutton@arm.com> | 2019-04-12 10:10:32 +0000 |
| commit | dd4cf2c74566c18adbb04944e6bf7a974276ec16 (patch) | |
| tree | 2a2f89a32d67a4e97164aef6c2394360e6bc633a /lib/aarch32 | |
| parent | c554e1ad82b0cf874a76e4685a4da61da14da1fe (diff) | |
Cortex A9:errata 794073 workaround
On Cortex A9 an errata can cause the processor to violate the rules for
speculative fetches when the MMU is off but branch prediction has not
been disabled. The workaround for this is to execute an Invalidate
Entire Branch Prediction Array (BPIALL) followed by a DSB.
see:http://arminfo.emea.arm.com/help/topic/com.arm.doc.uan0009d/UAN0009_cortex_a9_errata_r4.pdf
for more details.
Change-Id: I9146c1fa7563a79f4e15b6251617b9620a587c93
Signed-off-by: Joel Hutton <Joel.Hutton@arm.com>
Diffstat (limited to 'lib/aarch32')
| -rw-r--r-- | lib/aarch32/misc_helpers.S | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/lib/aarch32/misc_helpers.S b/lib/aarch32/misc_helpers.S index 77cf6cd9..6d2ec1c5 100644 --- a/lib/aarch32/misc_helpers.S +++ b/lib/aarch32/misc_helpers.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -171,6 +171,10 @@ endfunc memcpy4 func disable_mmu_secure mov r1, #(SCTLR_M_BIT | SCTLR_C_BIT) do_disable_mmu: +#if ERRATA_A9_794073 + stcopr r0, BPIALL + dsb +#endif ldcopr r0, SCTLR bic r0, r0, r1 stcopr r0, SCTLR |