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| author | Soby Mathew <soby.mathew@arm.com> | 2019-07-12 09:23:38 +0100 |
|---|---|---|
| committer | Soby Mathew <soby.mathew@arm.com> | 2019-07-12 09:27:25 +0100 |
| commit | b7e398d64cc4d5bfe279f1a50b7c7e4ea9263534 (patch) | |
| tree | f863afea96c59705f84614baedc2e6ea145ffa49 /include | |
| parent | 21bde92ff6d20ef2d3a2651fd729a1579232313b (diff) | |
Enable MTE support unilaterally for Normal World
This patch enables MTE for Normal world if the CPU suppors it. Enabling
MTE for secure world will be done later.
Change-Id: I9ef64460beaba15e9a9c20ab02da4fb2208b6f7d
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/arch/aarch64/arch.h | 8 | ||||
| -rw-r--r-- | include/arch/aarch64/arch_features.h | 6 |
2 files changed, 14 insertions, 0 deletions
diff --git a/include/arch/aarch64/arch.h b/include/arch/aarch64/arch.h index 502b8681..fdc1b646 100644 --- a/include/arch/aarch64/arch.h +++ b/include/arch/aarch64/arch.h @@ -219,6 +219,13 @@ #define BTI_IMPLEMENTED ULL(1) /* The BTI mechanism is implemented */ +#define ID_AA64PFR1_EL1_MTE_SHIFT U(8) +#define ID_AA64PFR1_EL1_MTE_MASK ULL(0xf) + +#define MTE_UNIMPLEMENTED ULL(0) +#define MTE_IMPLEMENTED_EL0 ULL(1) /* MTE is only implemented at EL0 */ +#define MTE_IMPLEMENTED_ELX ULL(2) /* MTE is implemented at all ELs */ + /* ID_PFR1_EL1 definitions */ #define ID_PFR1_VIRTEXT_SHIFT U(12) #define ID_PFR1_VIRTEXT_MASK U(0xf) @@ -276,6 +283,7 @@ /* SCR definitions */ #define SCR_RES1_BITS ((U(1) << 4) | (U(1) << 5)) +#define SCR_ATA_BIT (U(1) << 26) #define SCR_FIEN_BIT (U(1) << 21) #define SCR_API_BIT (U(1) << 17) #define SCR_APK_BIT (U(1) << 16) diff --git a/include/arch/aarch64/arch_features.h b/include/arch/aarch64/arch_features.h index 1129b8e4..2f29f487 100644 --- a/include/arch/aarch64/arch_features.h +++ b/include/arch/aarch64/arch_features.h @@ -54,4 +54,10 @@ static inline bool is_armv8_5_bti_present(void) ID_AA64PFR1_EL1_BT_MASK) == BTI_IMPLEMENTED; } +static inline unsigned int get_armv8_5_mte_support(void) +{ + return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_MTE_SHIFT) & + ID_AA64PFR1_EL1_MTE_MASK); +} + #endif /* ARCH_FEATURES_H */ |