diff options
| author | Alexei Fedorov <Alexei.Fedorov@arm.com> | 2019-07-29 13:34:07 +0100 |
|---|---|---|
| committer | Paul Beesley <paul.beesley@arm.com> | 2019-08-15 14:23:27 +0000 |
| commit | 6c6a470fc1c2e1a516214f1f6dbe00ef045d1d0f (patch) | |
| tree | f6dfe7d0aed3c91a9d0700075b9b06e01d3894f4 /include | |
| parent | 2102198ce8b9e51c2febea89c796de2863b63303 (diff) | |
AArch64: Align crash reporting output
This patch modifies crash reporting for AArch64 to provide
aligned output of register dump and GIC registers.
Change-Id: I8743bf1d2d6d56086e735df43785ef28051c5fc3
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/plat/arm/common/aarch64/arm_macros.S | 18 |
1 files changed, 14 insertions, 4 deletions
diff --git a/include/plat/arm/common/aarch64/arm_macros.S b/include/plat/arm/common/aarch64/arm_macros.S index 0bd0daf5..d47e4e09 100644 --- a/include/plat/arm/common/aarch64/arm_macros.S +++ b/include/plat/arm/common/aarch64/arm_macros.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -22,11 +22,13 @@ icc_regs: /* Registers common to both GICv2 and GICv3 */ gicd_pend_reg: - .asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n Offset:\t\t\tvalue\n" + .asciz "gicd_ispendr regs (Offsets 0x200-0x278)\nOffset\t\t\tValue\n" newline: .asciz "\n" spacer: - .asciz ":\t\t0x" + .asciz ":\t\t 0x" +prefix: + .asciz "0x" /* --------------------------------------------- * The below utility macro prints out relevant GIC @@ -77,7 +79,15 @@ gicd_ispendr_loop: sub x4, x7, x16 cmp x4, #0x280 b.eq exit_print_gic_regs - bl asm_print_hex + + /* Print "0x" */ + adr x4, prefix + bl asm_print_str + + /* Print offset */ + sub x4, x7, x16 + mov x5, #12 + bl asm_print_hex_bits adr x4, spacer bl asm_print_str |