diff options
| author | Louis Mayencourt <louis.mayencourt@arm.com> | 2019-05-14 11:00:45 +0100 |
|---|---|---|
| committer | Louis Mayencourt <louis.mayencourt@arm.com> | 2019-07-16 16:36:51 +0100 |
| commit | 294f9ef9f95829dc16297a24df1e9e83234875b8 (patch) | |
| tree | c7355279ba30a4e1b4572bbddd046adc95531707 /include | |
| parent | dc150425c36c83edf48654424fcbbc98ee17acea (diff) | |
Cortex_hercules: Introduce preliminary cpu support
Change-Id: Iab767e9937f5c6c8150953fcdc3b37e8ee83fa63
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/lib/cpus/aarch64/cortex_hercules.h | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/include/lib/cpus/aarch64/cortex_hercules.h b/include/lib/cpus/aarch64/cortex_hercules.h new file mode 100644 index 00000000..86e8af03 --- /dev/null +++ b/include/lib/cpus/aarch64/cortex_hercules.h @@ -0,0 +1,25 @@ +/* + * Copyright (c) 2019, ARM Limited. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef CORTEX_HERCULES_H +#define CORTEX_HERCULES_H + +#include <lib/utils_def.h> + +#define CORTEX_HERCULES_MIDR U(0x410FD410) + +/******************************************************************************* + * CPU Extended Control register specific definitions. + ******************************************************************************/ +#define CORTEX_HERCULES_CPUECTLR_EL1 S3_0_C15_C1_4 + +/******************************************************************************* + * CPU Power Control register specific definitions + ******************************************************************************/ +#define CORTEX_HERCULES_CPUPWRCTLR_EL1 S3_0_C15_C2_7 +#define CORTEX_HERCULES_CPUPWRCTLR_EL1_CORE_PWRDN_EN_BIT U(1) + +#endif /* CORTEX_HERCULES_H */ |