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authorSoby Mathew <soby.mathew@arm.com>2019-07-23 08:55:10 +0000
committerTrustedFirmware Code Review <review@review.trustedfirmware.org>2019-07-23 08:55:10 +0000
commit1d7dc63ca5e56fcf93210f4cba7c83683372a93c (patch)
treedcd4fc1ff6d16ea4f239693e98e8bb9897d9cc4c /include
parentb514ee86c4354a8fae21f853bc8d9c6728543267 (diff)
parentb7e398d64cc4d5bfe279f1a50b7c7e4ea9263534 (diff)
Merge "Enable MTE support unilaterally for Normal World" into integration
Diffstat (limited to 'include')
-rw-r--r--include/arch/aarch64/arch.h8
-rw-r--r--include/arch/aarch64/arch_features.h6
2 files changed, 14 insertions, 0 deletions
diff --git a/include/arch/aarch64/arch.h b/include/arch/aarch64/arch.h
index 913b62c5..e4147d7e 100644
--- a/include/arch/aarch64/arch.h
+++ b/include/arch/aarch64/arch.h
@@ -219,6 +219,13 @@
#define BTI_IMPLEMENTED ULL(1) /* The BTI mechanism is implemented */
+#define ID_AA64PFR1_EL1_MTE_SHIFT U(8)
+#define ID_AA64PFR1_EL1_MTE_MASK ULL(0xf)
+
+#define MTE_UNIMPLEMENTED ULL(0)
+#define MTE_IMPLEMENTED_EL0 ULL(1) /* MTE is only implemented at EL0 */
+#define MTE_IMPLEMENTED_ELX ULL(2) /* MTE is implemented at all ELs */
+
/* ID_PFR1_EL1 definitions */
#define ID_PFR1_VIRTEXT_SHIFT U(12)
#define ID_PFR1_VIRTEXT_MASK U(0xf)
@@ -278,6 +285,7 @@
/* SCR definitions */
#define SCR_RES1_BITS ((U(1) << 4) | (U(1) << 5))
+#define SCR_ATA_BIT (U(1) << 26)
#define SCR_FIEN_BIT (U(1) << 21)
#define SCR_API_BIT (U(1) << 17)
#define SCR_APK_BIT (U(1) << 16)
diff --git a/include/arch/aarch64/arch_features.h b/include/arch/aarch64/arch_features.h
index 1129b8e4..2f29f487 100644
--- a/include/arch/aarch64/arch_features.h
+++ b/include/arch/aarch64/arch_features.h
@@ -54,4 +54,10 @@ static inline bool is_armv8_5_bti_present(void)
ID_AA64PFR1_EL1_BT_MASK) == BTI_IMPLEMENTED;
}
+static inline unsigned int get_armv8_5_mte_support(void)
+{
+ return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_MTE_SHIFT) &
+ ID_AA64PFR1_EL1_MTE_MASK);
+}
+
#endif /* ARCH_FEATURES_H */