diff options
| author | Haojian Zhuang <haojian.zhuang@linaro.org> | 2017-06-02 08:51:17 +0800 |
|---|---|---|
| committer | Haojian Zhuang <haojian.zhuang@linaro.org> | 2017-06-07 11:53:56 +0800 |
| commit | e6a993d4277192f7c08a6cf7e39a36367caeeeaa (patch) | |
| tree | bec8222daf1db60142f7cdce568639625459bd17 /include | |
| parent | b15f31ac38ac0bebe3d5803d3db475bfce5f3bc3 (diff) | |
stdlib: support AARCH32 in endian head file
Add the support of AARCH32 in endian head file. The code is also
imported from FreeBSD 11.0. It's based on commit in below.
commit 4e3a5b429989b4ff621682ff1462f801237bd551
Author: mmel <mmel@FreeBSD.org>
Date: Tue Nov 10 12:02:41 2015 +0000
ARM: Remove trailing whitespace from sys/arm/include
No functional changes.
Approved by: kib (mentor)
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/lib/stdlib/machine/endian.h | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/include/lib/stdlib/machine/endian.h b/include/lib/stdlib/machine/endian.h index a6a0cb76..57e33b17 100644 --- a/include/lib/stdlib/machine/endian.h +++ b/include/lib/stdlib/machine/endian.h @@ -29,6 +29,10 @@ * $NetBSD: endian.h,v 1.7 1999/08/21 05:53:51 simonb Exp $ * $FreeBSD$ */ +/* + * Portions copyright (c) 2017, ARM Limited and Contributors. + * All rights reserved. + */ #ifndef _MACHINE_ENDIAN_H_ #define _MACHINE_ENDIAN_H_ @@ -59,6 +63,45 @@ #define __htonl(x) (__bswap32(x)) #define __htons(x) (__bswap16(x)) +#ifdef AARCH32 +static __inline __uint64_t +__bswap64(__uint64_t _x) +{ + + return ((_x >> 56) | ((_x >> 40) & 0xff00) | ((_x >> 24) & 0xff0000) | + ((_x >> 8) & 0xff000000) | ((_x << 8) & ((__uint64_t)0xff << 32)) | + ((_x << 24) & ((__uint64_t)0xff << 40)) | + ((_x << 40) & ((__uint64_t)0xff << 48)) | ((_x << 56))); +} + +static __inline __uint32_t +__bswap32_var(__uint32_t v) +{ + __uint32_t t1; + + __asm __volatile("eor %1, %0, %0, ror #16\n" + "bic %1, %1, #0x00ff0000\n" + "mov %0, %0, ror #8\n" + "eor %0, %0, %1, lsr #8\n" + : "+r" (v), "=r" (t1)); + + return (v); +} + +static __inline __uint16_t +__bswap16_var(__uint16_t v) +{ + __uint32_t ret = v & 0xffff; + + __asm __volatile( + "mov %0, %0, ror #8\n" + "orr %0, %0, %0, lsr #16\n" + "bic %0, %0, %0, lsl #16" + : "+r" (ret)); + + return ((__uint16_t)ret); +} +#elif defined AARCH64 static __inline __uint64_t __bswap64(__uint64_t x) { @@ -91,6 +134,9 @@ __bswap16_var(__uint16_t v) return ((__uint16_t)ret); } +#else +#error "Only AArch32 or AArch64 supported" +#endif /* AARCH32 */ #ifdef __OPTIMIZE__ |