diff options
| author | Soby Mathew <soby.mathew@arm.com> | 2017-05-10 11:50:30 +0100 |
|---|---|---|
| committer | Soby Mathew <soby.mathew@arm.com> | 2017-06-28 15:58:06 +0100 |
| commit | e60f2af9499e33583e920e72b463b58bce0c31ee (patch) | |
| tree | ed2db6480d8a4e78f504d22b2df9744859165511 /include | |
| parent | 4eb20d99c589c809be23c91b76bedd04a9ec66f5 (diff) | |
ARM plat changes to enable CryptoCell integration
This patch makes the necessary changes to enable ARM platform to
successfully integrate CryptoCell during Trusted Board Boot. The
changes are as follows:
* A new build option `ARM_CRYPTOCELL_INTEG` is introduced to select
the CryptoCell crypto driver for Trusted Board boot.
* The TrustZone filter settings for Non Secure DRAM is modified
to allow CryptoCell to read this memory. This is required to
authenticate BL33 which is loaded into the Non Secure DDR.
* The CSS platforms are modified to use coherent stacks in BL1 and BL2
when CryptoCell crypto is selected. This is because CryptoCell makes
use of DMA to transfer data and the CryptoCell SBROM library allocates
buffers on the stack during signature/hash verification.
Change-Id: I1e6f6dcd1899784f1edeabfa2a9f279bbfb90e31
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/plat/arm/common/arm_def.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h index ea309547..5dae30ec 100644 --- a/include/plat/arm/common/arm_def.h +++ b/include/plat/arm/common/arm_def.h @@ -83,6 +83,18 @@ #define ARM_AP_TZC_DRAM1_END (ARM_AP_TZC_DRAM1_BASE + \ ARM_AP_TZC_DRAM1_SIZE - 1) +/* Define the Access permissions for Secure peripherals to NS_DRAM */ +#if ARM_CRYPTOCELL_INTEG +/* + * Allow Secure peripheral to read NS DRAM when integrated with CryptoCell. + * This is required by CryptoCell to authenticate BL33 which is loaded + * into the Non Secure DDR. + */ +#define ARM_TZC_NS_DRAM_S_ACCESS TZC_REGION_S_RD +#else +#define ARM_TZC_NS_DRAM_S_ACCESS TZC_REGION_S_NONE +#endif + #define ARM_NS_DRAM1_BASE ARM_DRAM1_BASE #define ARM_NS_DRAM1_SIZE (ARM_DRAM1_SIZE - \ |