diff options
author | danh-arm <dan.handley@arm.com> | 2017-06-05 14:42:59 +0100 |
---|---|---|
committer | GitHub <noreply@github.com> | 2017-06-05 14:42:59 +0100 |
commit | b32e6b2b35cef4caa7625db6789ecf2d10a5ec8f (patch) | |
tree | ec93863594838d467d79a1105dec68c28c92f268 /include | |
parent | c66f4adee3db52a734707ffe2cc324fb1c9fb576 (diff) | |
parent | 40111d4473043a823eb0d2bdcac093a3ffc9df2b (diff) |
Merge pull request #963 from soby-mathew/sm/scmi_dev
Add SCMI power domain and system power protocol support
Diffstat (limited to 'include')
-rw-r--r-- | include/plat/arm/common/plat_arm.h | 3 | ||||
-rw-r--r-- | include/plat/arm/css/common/css_def.h | 18 |
2 files changed, 19 insertions, 2 deletions
diff --git a/include/plat/arm/common/plat_arm.h b/include/plat/arm/common/plat_arm.h index 79671731..62c0ce7e 100644 --- a/include/plat/arm/common/plat_arm.h +++ b/include/plat/arm/common/plat_arm.h @@ -46,7 +46,7 @@ void arm_setup_page_tables(uintptr_t total_base, * arm_lock_xxx() macros */ #define ARM_INSTANTIATE_LOCK DEFINE_BAKERY_LOCK(arm_lock); - +#define ARM_LOCK_GET_INSTANCE (&arm_lock) /* * These are wrapper macros to the Coherent Memory Bakery Lock API. */ @@ -60,6 +60,7 @@ void arm_setup_page_tables(uintptr_t total_base, * Empty macros for all other BL stages other than BL31 and BL32 */ #define ARM_INSTANTIATE_LOCK +#define ARM_LOCK_GET_INSTANCE 0 #define arm_lock_init() #define arm_lock_get() #define arm_lock_release() diff --git a/include/plat/arm/css/common/css_def.h b/include/plat/arm/css/common/css_def.h index 6f9d6401..0b74cede 100644 --- a/include/plat/arm/css/common/css_def.h +++ b/include/plat/arm/css/common/css_def.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -48,6 +48,17 @@ CSS_IRQ_SEC_SYS_TIMER /* + * The lower Non-secure MHU channel is being used for SCMI for ARM Trusted + * Firmware. + * TODO: Move SCMI to Secure channel once the migration to SCMI in SCP is + * complete. + */ +#define MHU_CPU_INTR_L_SET_OFFSET 0x108 +#define MHU_CPU_INTR_H_SET_OFFSET 0x128 +#define CSS_SCMI_PAYLOAD_BASE (NSRAM_BASE + 0x500) +#define CSS_SCMI_MHU_DB_REG_OFF MHU_CPU_INTR_L_SET_OFFSET + +/* * SCP <=> AP boot configuration * * The SCP/AP boot configuration is a 32-bit word located at a known offset from @@ -63,6 +74,11 @@ CSS_DEVICE_SIZE, \ MT_DEVICE | MT_RW | MT_SECURE) +#define CSS_MAP_NSRAM MAP_REGION_FLAT( \ + NSRAM_BASE, \ + NSRAM_SIZE, \ + MT_DEVICE | MT_RW | MT_SECURE) + /* Platform ID address */ #define SSC_VERSION_OFFSET 0x040 |