diff options
| author | Soby Mathew <soby.mathew@arm.com> | 2018-10-18 09:20:04 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-10-18 09:20:04 +0100 |
| commit | 7be05cd5d204dce5b6e18232516f20de7e9c26f8 (patch) | |
| tree | bb465fcbaed3dfc3231e3f1c3b01a3b691ea2728 /include/plat | |
| parent | 0a09313ec780d2f66efcda3eb2a5d1632719bd81 (diff) | |
| parent | 0f58d4f2c8173e01ce3276fbc7bd981c3f23d902 (diff) | |
Merge pull request #1628 from antonio-nino-diaz-arm/an/sharing
plat/arm: Small reorganization of platform code
Diffstat (limited to 'include/plat')
| -rw-r--r-- | include/plat/arm/board/common/board_arm_def.h | 62 | ||||
| -rw-r--r-- | include/plat/arm/board/common/board_css_def.h | 11 | ||||
| -rw-r--r-- | include/plat/arm/common/arm_def.h | 7 |
3 files changed, 17 insertions, 63 deletions
diff --git a/include/plat/arm/board/common/board_arm_def.h b/include/plat/arm/board/common/board_arm_def.h deleted file mode 100644 index a9272080..00000000 --- a/include/plat/arm/board/common/board_arm_def.h +++ /dev/null @@ -1,62 +0,0 @@ -/* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#ifndef __BOARD_ARM_DEF_H__ -#define __BOARD_ARM_DEF_H__ - -#include <v2m_def.h> - -/* - * Required platform porting definitions common to all ARM - * development platforms - */ - -/* Size of cacheable stacks */ -#if defined(IMAGE_BL1) -#if TRUSTED_BOARD_BOOT -# define PLATFORM_STACK_SIZE 0x1000 -#else -# define PLATFORM_STACK_SIZE 0x440 -#endif -#elif defined(IMAGE_BL2) -# if TRUSTED_BOARD_BOOT -# define PLATFORM_STACK_SIZE 0x1000 -# else -# define PLATFORM_STACK_SIZE 0x400 -# endif -#elif defined(IMAGE_BL2U) -# define PLATFORM_STACK_SIZE 0x400 -#elif defined(IMAGE_BL31) -#if ENABLE_SPM -# define PLATFORM_STACK_SIZE 0x500 -#elif PLAT_XLAT_TABLES_DYNAMIC -# define PLATFORM_STACK_SIZE 0x800 -#else -# define PLATFORM_STACK_SIZE 0x400 -#endif -#elif defined(IMAGE_BL32) -# define PLATFORM_STACK_SIZE 0x440 -#endif - -#define MAX_IO_DEVICES 3 -#define MAX_IO_HANDLES 4 - -#define PLAT_ARM_TRUSTED_SRAM_SIZE 0x00040000 /* 256 KB */ - -/* Reserve the last block of flash for PSCI MEM PROTECT flag */ -#define PLAT_ARM_FIP_BASE V2M_FLASH0_BASE -#define PLAT_ARM_FIP_MAX_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE) - -#define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE -#define PLAT_ARM_NVM_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE) - -/* - * Map mem_protect flash region with read and write permissions - */ -#define ARM_V2M_MAP_MEM_PROTECT MAP_REGION_FLAT(PLAT_ARM_MEM_PROT_ADDR, \ - V2M_FLASH_BLOCK_SIZE, \ - MT_DEVICE | MT_RW | MT_SECURE) - -#endif /* __BOARD_ARM_DEF_H__ */ diff --git a/include/plat/arm/board/common/board_css_def.h b/include/plat/arm/board/common/board_css_def.h index b0a6baf3..1a80e165 100644 --- a/include/plat/arm/board/common/board_css_def.h +++ b/include/plat/arm/board/common/board_css_def.h @@ -40,6 +40,16 @@ #endif /* __ASSEMBLY__ */ +#define MAX_IO_DEVICES 3 +#define MAX_IO_HANDLES 4 + +/* Reserve the last block of flash for PSCI MEM PROTECT flag */ +#define PLAT_ARM_FIP_BASE V2M_FLASH0_BASE +#define PLAT_ARM_FIP_MAX_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE) + +#define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE +#define PLAT_ARM_NVM_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE) + /* * Required platform porting definitions common to all ARM CSS-based * development platforms @@ -63,6 +73,5 @@ #define PLAT_ARM_TSP_UART_BASE V2M_IOFPGA_UART0_BASE #define PLAT_ARM_TSP_UART_CLK_IN_HZ V2M_IOFPGA_UART0_CLK_IN_HZ - #endif /* __BOARD_CSS_DEF_H__ */ diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h index 8d81af96..d5f5c15a 100644 --- a/include/plat/arm/common/arm_def.h +++ b/include/plat/arm/common/arm_def.h @@ -277,6 +277,13 @@ #endif /* + * Map mem_protect flash region with read and write permissions + */ +#define ARM_V2M_MAP_MEM_PROTECT MAP_REGION_FLAT(PLAT_ARM_MEM_PROT_ADDR, \ + V2M_FLASH_BLOCK_SIZE, \ + MT_DEVICE | MT_RW | MT_SECURE) + +/* * The max number of regions like RO(code), coherent and data required by * different BL stages which need to be mapped in the MMU. */ |