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authorAntonio Nino Diaz <antonio.ninodiaz@arm.com>2018-10-30 11:54:20 +0000
committerAntonio Nino Diaz <antonio.ninodiaz@arm.com>2018-12-10 16:37:46 +0000
commit09d413a158f884dafbf171723c60914cd41383d3 (patch)
tree56030d1de80b741581c8106bac194c66f17d8e18 /include/plat
parent08aa122bf5b073a1af0372b644b1ac4217ef155a (diff)
SPM: Remove SP memory mappings definitions
This information is retrieved from the resource description now. Change-Id: Iaae23945eb2c45305cdc6442853e42f4e04fe094 Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Diffstat (limited to 'include/plat')
-rw-r--r--include/plat/arm/common/arm_spm_def.h5
-rw-r--r--include/plat/arm/common/plat_arm.h2
2 files changed, 6 insertions, 1 deletions
diff --git a/include/plat/arm/common/arm_spm_def.h b/include/plat/arm/common/arm_spm_def.h
index a2220995..6fa5615e 100644
--- a/include/plat/arm/common/arm_spm_def.h
+++ b/include/plat/arm/common/arm_spm_def.h
@@ -27,6 +27,9 @@
ARM_SP_IMAGE_SIZE, \
MT_MEMORY | MT_RW | MT_SECURE)
#endif
+
+#if SPM_DEPRECATED
+
#ifdef IMAGE_BL31
/* SPM Payload memory. Mapped as code in S-EL1 */
#define ARM_SP_IMAGE_MMAP MAP_REGION2( \
@@ -96,6 +99,8 @@
/* Total number of memory regions with distinct properties */
#define ARM_SP_IMAGE_NUM_MEM_REGIONS 6
+#endif /* SPM_DEPRECATED */
+
/* Cookies passed to the Secure Partition at boot. Not used by ARM platforms. */
#define PLAT_SPM_COOKIE_0 ULL(0)
#define PLAT_SPM_COOKIE_1 ULL(0)
diff --git a/include/plat/arm/common/plat_arm.h b/include/plat/arm/common/plat_arm.h
index e7082d08..9b459841 100644
--- a/include/plat/arm/common/plat_arm.h
+++ b/include/plat/arm/common/plat_arm.h
@@ -37,7 +37,7 @@ typedef struct arm_tzc_regions_info {
* - Region 1 with secure access only;
* - the remaining DRAM regions access from the given Non-Secure masters.
******************************************************************************/
-#if ENABLE_SPM
+#if ENABLE_SPM && SPM_DEPRECATED
#define ARM_TZC_REGIONS_DEF \
{ARM_AP_TZC_DRAM1_BASE, ARM_EL3_TZC_DRAM1_END, \
TZC_REGION_S_RDWR, 0}, \