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authorlauwal01 <lauren.wehrmeister@arm.com>2019-06-24 11:28:34 -0500
committerlauwal01 <lauren.wehrmeister@arm.com>2019-07-02 09:14:54 -0500
commite34606f2e400c192bac3abeb9b2053b2c91ccd7c (patch)
tree0838213c1b952a10706c0198187a124f36a802a7 /include/lib
parenta601afe1585e8d53afb7c1ea87d0ba7a5bb85bd3 (diff)
Workaround for Neoverse N1 erratum 1130799
Neoverse N1 erratum 1130799 is a Cat B erratum [1], present in older revisions of the Neoverse N1 processor core. The workaround is to set a bit in the implementation defined CPUACTLR2_EL1 system register. [1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-466751330-10325/index.html Change-Id: I252bc45f9733443ba0503fefe62f50fdea61da6d Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Diffstat (limited to 'include/lib')
-rw-r--r--include/lib/cpus/aarch64/neoverse_n1.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/lib/cpus/aarch64/neoverse_n1.h b/include/lib/cpus/aarch64/neoverse_n1.h
index 9048f437..9042d703 100644
--- a/include/lib/cpus/aarch64/neoverse_n1.h
+++ b/include/lib/cpus/aarch64/neoverse_n1.h
@@ -41,6 +41,8 @@
#define NEOVERSE_N1_CPUACTLR2_EL1_BIT_2 (ULL(1) << 2)
#define NEOVERSE_N1_CPUACTLR2_EL1_BIT_16 (ULL(1) << 16)
+#define NEOVERSE_N1_CPUACTLR2_EL1_BIT_59 (ULL(1) << 59)
+
/* Instruction patching registers */
#define CPUPSELR_EL3 S3_6_C15_C8_0