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author | Heiko Stuebner <heiko@sntech.de> | 2019-04-05 14:44:33 +0200 |
---|---|---|
committer | Heiko Stuebner <heiko@sntech.de> | 2019-04-08 12:47:48 +0200 |
commit | 8785a7cf72ab35f038b0d1eafbb3860be7b114f8 (patch) | |
tree | 570c23ad3a4683bbb08a6a4960f6424afb665ab9 /include/lib | |
parent | c48991e1fe918f48508c088b443742622b9f2181 (diff) |
cpus: Fix Cortex-A12 MIDR mask
The Cortex-A12's primary part number is 0xC0D not 0xC0C, so
fix that to make the A12's cpu operations findable.
Change-Id: I4440a039cd57a2fe425fd8a8ec5499ca8e895e31
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'include/lib')
-rw-r--r-- | include/lib/cpus/aarch32/cortex_a12.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/lib/cpus/aarch32/cortex_a12.h b/include/lib/cpus/aarch32/cortex_a12.h index 8f6e7b8b..abacdbad 100644 --- a/include/lib/cpus/aarch32/cortex_a12.h +++ b/include/lib/cpus/aarch32/cortex_a12.h @@ -12,7 +12,7 @@ /******************************************************************************* * Cortex-A12 midr with version/revision set to 0 ******************************************************************************/ -#define CORTEX_A12_MIDR U(0x410FC0C0) +#define CORTEX_A12_MIDR U(0x410FC0D0) /******************************************************************************* * CPU Auxiliary Control register specific definitions. |