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| author | Etienne Carriere <etienne.carriere@st.com> | 2017-08-09 15:48:53 +0200 |
|---|---|---|
| committer | Etienne Carriere <etienne.carriere@st.com> | 2017-08-09 15:48:53 +0200 |
| commit | 71816096da8e5612cece752d813e10580df9f141 (patch) | |
| tree | ead9a6012f806050f68efc5e343e2924a0efb9ba /include/bl32 | |
| parent | 2f860c7815c648393f0604c872d5b39546da6419 (diff) | |
bl32: add secure interrupt handling in AArch32 sp_min
Add support for a minimal secure interrupt service in sp_min for
the AArch32 implementation. Hard code that only FIQs are handled.
Introduce bolean build directive SP_MIN_WITH_SECURE_FIQ to enable
FIQ handling from SP_MIN.
Configure SCR[FIQ] and SCR[FW] from generic code for both cold and
warm boots to handle FIQ in secure state from monitor.
Since SP_MIN architecture, FIQ are always trapped when system executes
in non secure state. Hence discard relay of the secure/non-secure
state in the FIQ handler.
Change-Id: I1f7d1dc7b21f6f90011b7f3fcd921e455592f5e7
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Diffstat (limited to 'include/bl32')
| -rw-r--r-- | include/bl32/sp_min/platform_sp_min.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/bl32/sp_min/platform_sp_min.h b/include/bl32/sp_min/platform_sp_min.h index 70c5c14d..6c7e0cc0 100644 --- a/include/bl32/sp_min/platform_sp_min.h +++ b/include/bl32/sp_min/platform_sp_min.h @@ -17,4 +17,7 @@ void sp_min_plat_runtime_setup(void); void sp_min_plat_arch_setup(void); entry_point_info_t *sp_min_plat_get_bl33_ep_info(void); +/* Platforms that enable SP_MIN_WITH_SECURE_FIQ shall implement this api */ +void sp_min_plat_fiq_handler(uint32_t id); + #endif /* __PLATFORM_SP_MIN_H__ */ |