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authorSandrine Bailleux <sandrine.bailleux@arm.com>2015-06-11 10:46:48 +0100
committerAchin Gupta <achin.gupta@arm.com>2015-08-13 20:05:31 +0100
commiteb975f52ea2e70216d214efcff3154f3cf081cb0 (patch)
treec7f84e060207959feefb4107631bd9d7e3ca44bf /include/bl31
parent8ee2498039f7409ab6aa3ed4ef7f0bce05b61fa3 (diff)
PSCI: Unify warm reset entry points
There used to be 2 warm reset entry points: - the "on finisher", for when the core has been turned on using a PSCI CPU_ON call; - the "suspend finisher", entered upon resumption from a previous PSCI CPU_SUSPEND call. The appropriate warm reset entry point used to be programmed into the mailboxes by the power management hooks. However, it is not required to provide this information to the PSCI entry point code, as it can figure it out by itself. By querying affinity info state, a core is able to determine on which execution path it is. If the state is ON_PENDING then it means it's been turned on else it is resuming from suspend. This patch unifies the 2 warm reset entry points into a single one: psci_entrypoint(). The patch also implements the necessary logic to distinguish between the 2 types of warm resets in the power up finisher. The plat_setup_psci_ops() API now takes the secure entry point as an additional parameter to enable the platforms to configure their mailbox. The platform hooks `pwr_domain_on` and `pwr_domain_suspend` no longer take secure entry point as a parameter. Change-Id: I7d1c93787b54213aefdbc046b8cd66a555dfbfd9
Diffstat (limited to 'include/bl31')
-rw-r--r--include/bl31/services/psci1.0/psci.h12
1 files changed, 5 insertions, 7 deletions
diff --git a/include/bl31/services/psci1.0/psci.h b/include/bl31/services/psci1.0/psci.h
index d79ab74d..fe23711e 100644
--- a/include/bl31/services/psci1.0/psci.h
+++ b/include/bl31/services/psci1.0/psci.h
@@ -256,13 +256,12 @@ typedef struct psci_cpu_data {
******************************************************************************/
typedef struct plat_psci_ops {
void (*cpu_standby)(plat_local_state_t cpu_state);
- int (*pwr_domain_on)(u_register_t mpidr,
- unsigned long sec_entrypoint);
+ int (*pwr_domain_on)(u_register_t mpidr);
void (*pwr_domain_off)(const psci_power_state_t *target_state);
- void (*pwr_domain_suspend)(unsigned long sec_entrypoint,
- const psci_power_state_t *target_state);
+ void (*pwr_domain_suspend)(const psci_power_state_t *target_state);
void (*pwr_domain_on_finish)(const psci_power_state_t *target_state);
- void (*pwr_domain_suspend_finish)(const psci_power_state_t *target_state);
+ void (*pwr_domain_suspend_finish)(
+ const psci_power_state_t *target_state);
void (*system_off)(void) __dead2;
void (*system_reset)(void) __dead2;
int (*validate_power_state)(unsigned int power_state,
@@ -302,8 +301,7 @@ int psci_cpu_on(unsigned long,
unsigned long,
unsigned long);
void __dead2 psci_power_down_wfi(void);
-void psci_cpu_on_finish_entry(void);
-void psci_cpu_suspend_finish_entry(void);
+void psci_entrypoint(void);
void psci_register_spd_pm_hook(const spd_pm_ops_t *);
uint64_t psci_smc_handler(uint32_t smc_fid,