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authorUsama Arif <usama.arif@arm.com>2019-09-19 11:07:24 +0100
committerUsama Arif <usama.arif@arm.com>2019-09-23 17:08:05 +0100
commitec885bacb247e9a88c0e21406bdf42821eb340c7 (patch)
tree3fd86aacaaeb714a88a38a03549b3533ac9d5497 /fdts
parente231f3a5f46f3897368521e0b61fec8cad91b35e (diff)
a5ds: add multicore support
Enable cores 1-3 using psci. On receiving the smc call from kernel, core 0 will bring the secondary cores out pen and signal an event for the cores. Currently on switching the cores is enabled i.e. it is not possible to suspend, switch cores off, etc. Change-Id: I6087e1d2ec650e1d587fd543efc1b08cbb50ae5f Signed-off-by: Usama Arif <usama.arif@arm.com>
Diffstat (limited to 'fdts')
-rw-r--r--fdts/a5ds.dts26
1 files changed, 26 insertions, 0 deletions
diff --git a/fdts/a5ds.dts b/fdts/a5ds.dts
index 8bc4adf8..91212e8a 100644
--- a/fdts/a5ds.dts
+++ b/fdts/a5ds.dts
@@ -12,14 +12,40 @@
interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <1>;
+
+ psci {
+ compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci";
+ method = "smc";
+ cpu_on = <0x84000003>;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a5";
+ enable-method = "psci";
reg = <0>;
};
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a5";
+ enable-method = "psci";
+ reg = <1>;
+ };
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a5";
+ enable-method = "psci";
+ reg = <2>;
+ };
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a5";
+ enable-method = "psci";
+ reg = <3>;
+ };
};
memory@80000000 {