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authorYann Gautier <yann.gautier@st.com>2019-04-16 16:20:58 +0200
committerYann Gautier <yann.gautier@st.com>2019-09-02 17:52:29 +0200
commit4b549b215360bfed4d7cd14247d9c99a995ca217 (patch)
treef1bbdef802e6cf52e25265cd19fd6aa30aa35ed2 /drivers
parente463d3f43e0115fbafd7a17f7ba550fc8e9a2ae0 (diff)
stm32mp1: add support for LpDDR3
This change enables LpDDR3 initialization with PMIC. Change-Id: I2409a808335dfacd69a8517cb8510cee98bb8161 Signed-off-by: Yann Gautier <yann.gautier@st.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/st/ddr/stm32mp1_ddr.c2
-rw-r--r--drivers/st/pmic/stm32mp_pmic.c1
2 files changed, 3 insertions, 0 deletions
diff --git a/drivers/st/ddr/stm32mp1_ddr.c b/drivers/st/ddr/stm32mp1_ddr.c
index caf8eefa..7d89d027 100644
--- a/drivers/st/ddr/stm32mp1_ddr.c
+++ b/drivers/st/ddr/stm32mp1_ddr.c
@@ -717,6 +717,8 @@ void stm32mp1_ddr_init(struct ddr_info *priv,
ret = board_ddr_power_init(STM32MP_DDR3);
} else if ((config->c_reg.mstr & DDRCTRL_MSTR_LPDDR2) != 0U) {
ret = board_ddr_power_init(STM32MP_LPDDR2);
+ } else if ((config->c_reg.mstr & DDRCTRL_MSTR_LPDDR3) != 0U) {
+ ret = board_ddr_power_init(STM32MP_LPDDR3);
} else {
ERROR("DDR type not supported\n");
}
diff --git a/drivers/st/pmic/stm32mp_pmic.c b/drivers/st/pmic/stm32mp_pmic.c
index 6fe51f44..9e9dddc4 100644
--- a/drivers/st/pmic/stm32mp_pmic.c
+++ b/drivers/st/pmic/stm32mp_pmic.c
@@ -299,6 +299,7 @@ int pmic_ddr_power_init(enum ddr_type ddr_type)
break;
case STM32MP_LPDDR2:
+ case STM32MP_LPDDR3:
/*
* Set LDO3 to 1.8V
* Set LDO3 to bypass mode if BUCK3 = 1.8V