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authorRoberto Vargas <roberto.vargas@arm.com>2018-02-12 12:36:17 +0000
committerRoberto Vargas <roberto.vargas@arm.com>2018-02-28 17:19:55 +0000
commit1af540ef2a09797c3a22c40c340facd4b2f47c2f (patch)
treea36750064472fc321e69f8b1b497158277776187 /drivers
parentdc6aad2e133829ee4c7bb9d2ba87c43f668f2acb (diff)
Fix MISRA rule 8.4 Part 1
Rule 8.4: A compatible declaration shall be visible when an object or function with external linkage is defined Fixed for: make DEBUG=1 PLAT=fvp LOG_LEVEL=50 all Change-Id: I7c2ad3f5c015411c202605851240d5347e4cc8c7 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/arm/gic/v3/gicv3_main.c4
-rw-r--r--drivers/arm/gic/v3/gicv3_private.h4
-rw-r--r--drivers/arm/tzc/tzc400.c2
-rw-r--r--drivers/arm/tzc/tzc_common_private.h6
4 files changed, 9 insertions, 7 deletions
diff --git a/drivers/arm/gic/v3/gicv3_main.c b/drivers/arm/gic/v3/gicv3_main.c
index 8de5be3f..45a2e5bc 100644
--- a/drivers/arm/gic/v3/gicv3_main.c
+++ b/drivers/arm/gic/v3/gicv3_main.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -21,7 +21,7 @@ static unsigned int gicv2_compat;
* spinlock are used either at boot time (when only a single CPU is active), or
* when the system is fully coherent.
*/
-spinlock_t gic_lock;
+static spinlock_t gic_lock;
/*
* Redistributor power operations are weakly bound so that they can be
diff --git a/drivers/arm/gic/v3/gicv3_private.h b/drivers/arm/gic/v3/gicv3_private.h
index 52039074..c4474a4c 100644
--- a/drivers/arm/gic/v3/gicv3_private.h
+++ b/drivers/arm/gic/v3/gicv3_private.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -79,6 +79,8 @@ void gicd_clr_igrpmodr(uintptr_t base, unsigned int id);
void gicr_clr_igrpmodr0(uintptr_t base, unsigned int id);
void gicr_clr_igroupr0(uintptr_t base, unsigned int id);
void gicr_set_ipriorityr(uintptr_t base, unsigned int id, unsigned int pri);
+void gicr_set_icfgr0(uintptr_t base, unsigned int id, unsigned int cfg);
+void gicr_set_icfgr1(uintptr_t base, unsigned int id, unsigned int cfg);
/*******************************************************************************
* Private GICv3 helper function prototypes
diff --git a/drivers/arm/tzc/tzc400.c b/drivers/arm/tzc/tzc400.c
index 34462a92..0999fa54 100644
--- a/drivers/arm/tzc/tzc400.c
+++ b/drivers/arm/tzc/tzc400.c
@@ -34,7 +34,7 @@ typedef struct tzc400_instance {
uint8_t num_regions;
} tzc400_instance_t;
-tzc400_instance_t tzc400;
+static tzc400_instance_t tzc400;
static inline unsigned int _tzc400_read_build_config(uintptr_t base)
{
diff --git a/drivers/arm/tzc/tzc_common_private.h b/drivers/arm/tzc/tzc_common_private.h
index 89156ed5..e1b7727a 100644
--- a/drivers/arm/tzc/tzc_common_private.h
+++ b/drivers/arm/tzc/tzc_common_private.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -93,7 +93,7 @@
* It is used to program region 0 ATTRIBUTES and ACCESS register.
*/
#define DEFINE_TZC_COMMON_CONFIGURE_REGION0(fn_name) \
- void _tzc##fn_name##_configure_region0(uintptr_t base, \
+ static void _tzc##fn_name##_configure_region0(uintptr_t base, \
tzc_region_attributes_t sec_attr, \
unsigned int ns_device_access) \
{ \
@@ -124,7 +124,7 @@
* that function).
*/
#define DEFINE_TZC_COMMON_CONFIGURE_REGION(fn_name) \
- void _tzc##fn_name##_configure_region(uintptr_t base, \
+ static void _tzc##fn_name##_configure_region(uintptr_t base, \
unsigned int filters, \
int region_no, \
unsigned long long region_base, \