diff options
| author | fengbaopeng <fengbaopeng@hisilicon.com> | 2018-02-12 20:53:54 +0800 |
|---|---|---|
| committer | wei li <liwei213@huawei.com> | 2018-02-24 09:30:41 +0800 |
| commit | 5ac25de695520bb60b54bbe91a66c58ba28bde42 (patch) | |
| tree | 493081d39e9b78edae567cf78d325920f90ef78d /drivers/synopsys | |
| parent | 15e5958560e9d31e7357e3a0ada2289e78758839 (diff) | |
drivers:ufs: fix hynix ufs bug with quirk on hi36xx SoC
Hynix ufs has deviations on hi36xx platform which will result
in ufs bursts transfer failures at a very low probability.
To fix the problem, the Hynix device must set the register
VS_DebugSaveConfigTime to 0x10, which will set time reference
for SaveConfigTime is 250 ns. The time reference for SaveConfigTime
is 40 ns by default.
Signed-off-by: fengbaopeng <fengbaopeng@hisilicon.com>
Diffstat (limited to 'drivers/synopsys')
| -rw-r--r-- | drivers/synopsys/ufs/dw_ufs.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/synopsys/ufs/dw_ufs.c b/drivers/synopsys/ufs/dw_ufs.c index d8ed5b6c..b0ea3e73 100644 --- a/drivers/synopsys/ufs/dw_ufs.c +++ b/drivers/synopsys/ufs/dw_ufs.c @@ -97,10 +97,21 @@ static int dwufs_phy_set_pwr_mode(ufs_params_t *params) int result; unsigned int data, tx_lanes, rx_lanes; uintptr_t base; + unsigned int flags; assert((params != NULL) && (params->reg_base != 0)); base = params->reg_base; + flags = params->flags; + if ((flags & UFS_FLAGS_VENDOR_SKHYNIX) != 0U) { + NOTICE("ufs: H**** device must set VS_DebugSaveConfigTime 0x10\n"); + /* VS_DebugSaveConfigTime */ + result = ufshc_dme_set(0xd0a0, 0x0, 0x10); + assert(result == 0); + /* sync length */ + result = ufshc_dme_set(0x1556, 0x0, 0x48); + assert(result == 0); + } result = ufshc_dme_get(PA_TACTIVATE_OFFSET, 0, &data); assert(result == 0); |