diff options
| author | Marek Vasut <marek.vasut+renesas@gmail.com> | 2019-07-14 08:55:27 +0200 |
|---|---|---|
| committer | Marek Vasut <marek.vasut+renesas@gmail.com> | 2019-07-14 09:16:35 +0200 |
| commit | 8ddd91b0f6c06f09a78a37163a650a3c75d820fa (patch) | |
| tree | aea5c65b5cfd2eb98a56fea9503a25431a0664f4 /drivers/staging/renesas/rcar/ddr/ddr_b | |
| parent | 9b350702498ba64917bf0a46a60fe8c165b9955b (diff) | |
rcar_gen3: drivers: ddr: Replace BITn with BIT(n) macro
Remove the ad-hoc BITn macros and replace them with generic BIT(n) macro.
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I5d0b44d6cba5a69895fed505f6ff780d3574907f
Diffstat (limited to 'drivers/staging/renesas/rcar/ddr/ddr_b')
| -rw-r--r-- | drivers/staging/renesas/rcar/ddr/ddr_b/boot_init_dram.c | 6 | ||||
| -rw-r--r-- | drivers/staging/renesas/rcar/ddr/ddr_b/boot_init_dram_config.c | 15 |
2 files changed, 8 insertions, 13 deletions
diff --git a/drivers/staging/renesas/rcar/ddr/ddr_b/boot_init_dram.c b/drivers/staging/renesas/rcar/ddr/ddr_b/boot_init_dram.c index 9c53074c..89d666ce 100644 --- a/drivers/staging/renesas/rcar/ddr/ddr_b/boot_init_dram.c +++ b/drivers/staging/renesas/rcar/ddr/ddr_b/boot_init_dram.c @@ -4221,10 +4221,10 @@ int32_t rcar_dram_init(void) Thermal sensor setting ***********************************************************************/ dataL = mmio_read_32(CPG_MSTPSR5); - if (dataL & BIT22) { /* case THS/TSC Standby */ - dataL &= ~(BIT22); + if (dataL & BIT(22)) { /* case THS/TSC Standby */ + dataL &= ~(BIT(22)); cpg_write_32(CPG_SMSTPCR5, dataL); - while ((BIT22) & mmio_read_32(CPG_MSTPSR5)); /* wait bit=0 */ + while ((BIT(22)) & mmio_read_32(CPG_MSTPSR5)); /* wait bit=0 */ } /* THCTR Bit6: PONM=0 , Bit0: THSST=0 */ diff --git a/drivers/staging/renesas/rcar/ddr/ddr_b/boot_init_dram_config.c b/drivers/staging/renesas/rcar/ddr/ddr_b/boot_init_dram_config.c index 0b10e5ff..5d1b078c 100644 --- a/drivers/staging/renesas/rcar/ddr/ddr_b/boot_init_dram_config.c +++ b/drivers/staging/renesas/rcar/ddr/ddr_b/boot_init_dram_config.c @@ -1623,12 +1623,7 @@ static const uint32_t TermcodeBySample[20][3] = { #define PFC_PUD6 0xE6060458U #define GPIO_INDT5 0xE605500CU #define GPIO_INDT6 0xE605540CU - -#define BIT25 BIT(25) -#define BIT22 BIT(22) -#define BIT15 BIT(15) -#define BIT0 BIT(0) -#define GPIO_GPSR6 (0xE6060118U) +#define GPIO_GPSR6 0xE6060118U #if (RCAR_GEN3_ULCB == 0) static void pfc_write_and_poll(uint32_t a, uint32_t v) @@ -1659,17 +1654,17 @@ static uint32_t opencheck_SSI_WS6(void) pud5_bak = mmio_read_32(PFC_PUD5); dsb_sev(); - dataL = (gpsr6_bak & ~BIT15); + dataL = (gpsr6_bak & ~BIT(15)); pfc_write_and_poll(GPIO_GPSR6, dataL); /* Pull-Up/Down Enable (PUEN5[22]=1) */ dataL = puen5_bak; - dataL |= (BIT22); + dataL |= (BIT(22)); pfc_write_and_poll(PFC_PUEN5, dataL); /* Pull-Down-Enable (PUD5[22]=0, PUEN5[22]=1) */ dataL = pud5_bak; - dataL &= ~(BIT22); + dataL &= ~(BIT(22)); pfc_write_and_poll(PFC_PUD5, dataL); /* GPSR6[15]=SSI_WS6 */ rcar_micro_delay(10); @@ -1678,7 +1673,7 @@ static uint32_t opencheck_SSI_WS6(void) /* Pull-Up-Enable (PUD5[22]=1, PUEN5[22]=1) */ dataL = pud5_bak; - dataL |= (BIT22); + dataL |= (BIT(22)); pfc_write_and_poll(PFC_PUD5, dataL); /* GPSR6[15]=SSI_WS6 */ |