diff options
| author | Yann Gautier <yann.gautier@st.com> | 2019-02-14 11:13:25 +0100 |
|---|---|---|
| committer | Yann Gautier <yann.gautier@st.com> | 2019-02-14 11:20:23 +0100 |
| commit | c9d75b3cf98c7f2a78d3f916bcf9e2b3a2c55967 (patch) | |
| tree | 62db3f4e48df5caece7fd78dded5774ca3727517 /drivers/st | |
| parent | eaea119ea12d20837d3ada880621ac0a895f98eb (diff) | |
stm32mp1: split code between common and private parts
Some parts of code could be shared with platform derivatives,
or new platforms.
A new folder plat/st/common is created to put common parts.
stm32mp_common.h is a common API aggregate.
Remove some casts where applicable.
Fix some types where applicable.
Remove also some platform includes that are already in stm32mp1_def.h.
Change-Id: I46d763c8d9e15732d1ee7383207fd58206d7f583
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Diffstat (limited to 'drivers/st')
| -rw-r--r-- | drivers/st/gpio/stm32_gpio.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/st/gpio/stm32_gpio.c b/drivers/st/gpio/stm32_gpio.c index d217c450..5fee82cd 100644 --- a/drivers/st/gpio/stm32_gpio.c +++ b/drivers/st/gpio/stm32_gpio.c @@ -254,17 +254,17 @@ void set_gpio(uint32_t bank, uint32_t pin, uint32_t mode, uint32_t speed, VERBOSE("GPIO %u mode alternate high to 0x%x\n", bank, mmio_read_32(base + GPIO_AFRH_OFFSET)); - stm32mp1_clk_disable((unsigned long)clock); + stm32mp1_clk_disable(clock); } void set_gpio_secure_cfg(uint32_t bank, uint32_t pin, bool secure) { uintptr_t base = stm32_get_gpio_bank_base(bank); - int clock = stm32_get_gpio_bank_clock(bank); + unsigned long clock = stm32_get_gpio_bank_clock(bank); assert(pin <= GPIO_PIN_MAX); - stm32mp1_clk_enable((unsigned long)clock); + stm32mp1_clk_enable(clock); if (secure) { mmio_setbits_32(base + GPIO_SECR_OFFSET, BIT(pin)); @@ -272,5 +272,5 @@ void set_gpio_secure_cfg(uint32_t bank, uint32_t pin, bool secure) mmio_clrbits_32(base + GPIO_SECR_OFFSET, BIT(pin)); } - stm32mp1_clk_disable((unsigned long)clock); + stm32mp1_clk_disable(clock); } |