diff options
| author | Marek Vasut <marek.vasut+renesas@gmail.com> | 2018-12-27 20:28:45 +0100 |
|---|---|---|
| committer | Marek Vasut <marek.vasut+renesas@gmail.com> | 2019-01-08 14:08:44 +0100 |
| commit | 8cbc4178363926999cfbc7f4e2f46bbdf8fa78ee (patch) | |
| tree | f13caeb9ed763d9bd7646e60ffa7c2a1cee59243 /drivers/renesas | |
| parent | dc03e8438f5cb1bcc077850649016e739c4677d9 (diff) | |
rcar_gen3: drivers: swdt: Access SCR in EL3
The code runs in EL3, use EL3 accessors to manipulate the interrupt bit.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Diffstat (limited to 'drivers/renesas')
| -rw-r--r-- | drivers/renesas/rcar/watchdog/swdt.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/renesas/rcar/watchdog/swdt.c b/drivers/renesas/rcar/watchdog/swdt.c index 42f86534..7793ae50 100644 --- a/drivers/renesas/rcar/watchdog/swdt.c +++ b/drivers/renesas/rcar/watchdog/swdt.c @@ -133,7 +133,11 @@ void rcar_swdt_release(void) (ARM_IRQ_SEC_WDT & ~ITARGET_MASK); uint32_t i; + /* Disable FIQ interrupt */ write_daifset(DAIF_FIQ_BIT); + /* FIQ interrupts are not taken to EL3 */ + write_scr_el3(read_scr_el3() & ~SCR_FIQ_BIT); + swdt_disable(); gicv2_cpuif_disable(); |