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| author | Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> | 2019-03-15 23:19:28 +0900 |
|---|---|---|
| committer | Marek Vasut <marek.vasut+renesas@gmail.com> | 2019-04-11 12:57:02 +0200 |
| commit | 4983f8b63c9df1e1cb3c472688ab91379d114949 (patch) | |
| tree | e14b89592dbbf69b299785410070f10926671a3b /drivers/renesas | |
| parent | 285b6cfe3bc2b6b9c90ff0300e87457d00417186 (diff) | |
rcar_gen3: drivers: pwrc: Add DBSC4 setting before self-refresh mode
Very rarely, LPDDR4 power consumption may not decrease
In self-refresh mode.
This patch fixes the DBSC4 self-refresh mode sequence.
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Signed-off-by: Kenji Miyazawa <kenji.miyazawa.xt@renesas.com>
Signed-off-by: Chiaki Fujii <chiaki.fujii.wj@renesas.com>
Change-Id: I838fa0892b1caf1ecd3f04538b3427e7d971ef59
Diffstat (limited to 'drivers/renesas')
| -rw-r--r-- | drivers/renesas/rcar/pwrc/pwrc.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/renesas/rcar/pwrc/pwrc.c b/drivers/renesas/rcar/pwrc/pwrc.c index 8bea1b51..e223f071 100644 --- a/drivers/renesas/rcar/pwrc/pwrc.c +++ b/drivers/renesas/rcar/pwrc/pwrc.c @@ -50,6 +50,7 @@ RCAR_INSTANTIATE_LOCK #define DBSC4_REG_DBRFEN (DBSC4_REG_BASE + 0x0204U) #define DBSC4_REG_DBWAIT (DBSC4_REG_BASE + 0x0210U) #define DBSC4_REG_DBCALCNF (DBSC4_REG_BASE + 0x0424U) +#define DBSC4_REG_DBDFIPMSTRCNF (DBSC4_REG_BASE + 0x0520U) #define DBSC4_REG_DBPDLK0 (DBSC4_REG_BASE + 0x0620U) #define DBSC4_REG_DBPDRGA0 (DBSC4_REG_BASE + 0x0624U) #define DBSC4_REG_DBPDRGD0 (DBSC4_REG_BASE + 0x0628U) @@ -61,6 +62,7 @@ RCAR_INSTANTIATE_LOCK #define DBSC4_BIT_DBACEN_ACCEN ((uint32_t)(1U << 0)) #define DBSC4_BIT_DBRFEN_ARFEN ((uint32_t)(1U << 0)) #define DBSC4_BIT_DBCAMxSTAT0 (0x00000001U) +#define DBSC4_BIT_DBDFIPMSTRCNF_PMSTREN (0x00000001U) #define DBSC4_SET_DBCMD_OPC_PRE (0x04000000U) #define DBSC4_SET_DBCMD_OPC_SR (0x0A000000U) #define DBSC4_SET_DBCMD_OPC_PD (0x08000000U) @@ -393,6 +395,11 @@ static void __attribute__ ((section(".system_ram"))) self_refresh: + /* DFI_PHYMSTR_ACK setting */ + mmio_write_32(DBSC4_REG_DBDFIPMSTRCNF, + mmio_read_32(DBSC4_REG_DBDFIPMSTRCNF) & + (~DBSC4_BIT_DBDFIPMSTRCNF_PMSTREN)); + /* Set the Self-Refresh mode */ mmio_write_32(DBSC4_REG_DBACEN, 0); |