diff options
| author | Soby Mathew <soby.mathew@arm.com> | 2019-09-12 12:31:22 +0000 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2019-09-12 12:31:22 +0000 |
| commit | 91624b7fed52cb926f327fd63d0c0e14c53f8cb3 (patch) | |
| tree | c248950d8373879dcf124d323a8d22847229d570 /docs | |
| parent | 5beeec7980ad683872c68e63471fb9d6a7c462f5 (diff) | |
| parent | 88d493fb1b0a780809aea491fc30a145af92930b (diff) | |
Merge changes from topic "jc/mte_enable" into integration
* changes:
Add documentation for CTX_INCLUDE_MTE_REGS
Enable MTE support in both secure and non-secure worlds
Diffstat (limited to 'docs')
| -rw-r--r-- | docs/design/firmware-design.rst | 11 | ||||
| -rw-r--r-- | docs/getting_started/user-guide.rst | 8 |
2 files changed, 18 insertions, 1 deletions
diff --git a/docs/design/firmware-design.rst b/docs/design/firmware-design.rst index 00e199a2..dc082082 100644 --- a/docs/design/firmware-design.rst +++ b/docs/design/firmware-design.rst @@ -2581,7 +2581,16 @@ Armv8.5-A ~~~~~~~~~ - Branch Target Identification feature is selected by ``BRANCH_PROTECTION`` - option set to 1. This option defaults to 0 and this is an experimental feature. + option set to 1. This option defaults to 0 and this is an experimental + feature. + +- Memory Tagging Extension feature is unconditionally enabled for both worlds + (at EL0 and S-EL0) if it is only supported at EL0. If instead it is + implemented at all ELs, it is unconditionally enabled for only the normal + world. To enable it for the secure world as well, the build option + ``CTX_INCLUDE_MTE_REGS`` is required. If the hardware does not implement + MTE support at all, it is always disabled, no matter what build options + are used. Armv7-A ~~~~~~~ diff --git a/docs/getting_started/user-guide.rst b/docs/getting_started/user-guide.rst index 1cfd4c73..1a7977e7 100644 --- a/docs/getting_started/user-guide.rst +++ b/docs/getting_started/user-guide.rst @@ -383,6 +383,13 @@ Common build options registers to be included when saving and restoring the CPU context. Default is 0. +- ``CTX_INCLUDE_MTE_REGS``: Enables register saving/reloading support for + ARMv8.5 Memory Tagging Extension. A value of 0 will disable + saving/reloading and restrict the use of MTE to the normal world if the + CPU has support, while a value of 1 enables the saving/reloading, allowing + the use of MTE in both the secure and non-secure worlds. Default is 0 + (disabled) and this feature is experimental. + - ``CTX_INCLUDE_PAUTH_REGS``: Boolean option that, when set to 1, enables Pointer Authentication for Secure world. This will cause the ARMv8.3-PAuth registers to be included when saving and restoring the CPU context as @@ -813,6 +820,7 @@ Common build options cluster platforms). If this option is enabled, then warm boot path enables D-caches immediately after enabling MMU. This option defaults to 0. + Arm development platform specific build options ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ |