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authorSoby Mathew <soby.mathew@arm.com>2019-09-27 09:42:37 +0000
committerTrustedFirmware Code Review <review@review.trustedfirmware.org>2019-09-27 09:42:37 +0000
commit41bda863305eae92db2e4e18cd057797765d261c (patch)
tree4446d13e90dfb14e67abf7510e0eb8c9de1c74bc /docs
parent69ef7b7ffe66b64bdffee0a387774e7088022503 (diff)
parent6806cd2381901d424b40ba3f17d23f5ffa4ca57e (diff)
Merge changes from topic "mp/giv3-discovery" into integration
* changes: Migrate ARM platforms to use the new GICv3 API Adding new optional PSCI hook pwr_domain_on_finish_late GICv3: Enable multi socket GIC redistributor frame discovery
Diffstat (limited to 'docs')
-rw-r--r--docs/getting_started/porting-guide.rst13
1 files changed, 13 insertions, 0 deletions
diff --git a/docs/getting_started/porting-guide.rst b/docs/getting_started/porting-guide.rst
index 97ed1fa4..9eb7c17e 100644
--- a/docs/getting_started/porting-guide.rst
+++ b/docs/getting_started/porting-guide.rst
@@ -2209,6 +2209,19 @@ immediately before the CPU was turned on. It indicates which power domains
above the CPU might require initialization due to having previously been in
low power states. The generic code expects the handler to succeed.
+plat_psci_ops.pwr_domain_on_finish_late() [optional]
+...........................................................
+
+This optional function is called by the PSCI implementation after the calling
+CPU is fully powered on with respective data caches enabled. The calling CPU and
+the associated cluster are guaranteed to be participating in coherency. This
+function gives the flexibility to perform any platform-specific actions safely,
+such as initialization or modification of shared data structures, without the
+overhead of explicit cache maintainace operations.
+
+The ``target_state`` has a similar meaning as described in the ``pwr_domain_on_finish()``
+operation. The generic code expects the handler to succeed.
+
plat_psci_ops.pwr_domain_suspend_finish()
.........................................