diff options
| author | Varun Wadekar <vwadekar@nvidia.com> | 2017-07-21 13:34:16 -0700 |
|---|---|---|
| committer | Varun Wadekar <vwadekar@nvidia.com> | 2019-01-18 09:21:51 -0800 |
| commit | 087cf68a7f7a3af0e82252c0e40f04c435e0708e (patch) | |
| tree | 83d195ed72b5fc501f16d020c93afdcd452c7675 /docs/plat | |
| parent | 6460ed7aaab06b1d88f7e20d4ee9b9b0b9fb58fc (diff) | |
Tegra: lib: library for profiling the cold boot path
The non secure world would like to profile the boot path for
the EL3 and S-EL1 firmwares. To allow it to do that, a non-secure
DRAM region (4K) is allocated and the base address is passed to
the EL3 firmware.
This patch adds a library to allow the platform code to store the
tag:timestamp pair to the shared memory. The tegra platform code
then uses the `record` method to add timestamps.
Original change by Akshay Sharan <asharan@nvidia.com>
Change-Id: Idbbef9c83ed84a508b04d85a6637775960dc94ba
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'docs/plat')
| -rw-r--r-- | docs/plat/nvidia-tegra.rst | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/docs/plat/nvidia-tegra.rst b/docs/plat/nvidia-tegra.rst index e244c1c9..90d2ae13 100644 --- a/docs/plat/nvidia-tegra.rst +++ b/docs/plat/nvidia-tegra.rst @@ -82,6 +82,8 @@ uint64\_t tzdram\_base; int uart\_id; /* L2 ECC parity protection disable flag \*/ int l2\_ecc\_parity\_prot\_dis; +/* SHMEM base address for storing the boot logs \*/ +uint64\_t boot\_profiler\_shmem\_base; } plat\_params\_from\_bl2\_t; Power Management |