diff options
| author | Paul Beesley <paul.beesley@arm.com> | 2019-03-13 16:20:44 +0000 |
|---|---|---|
| committer | Paul Beesley <paul.beesley@arm.com> | 2019-05-22 11:28:17 +0100 |
| commit | e1c5026ac7e9da1b74047bf8cb9be2a5c9564532 (patch) | |
| tree | 3bb1ef189bb925077dc61581521cf4f3ffa979dc /docs/index.rst | |
| parent | f94102ba965709aa6110e60b03a6d9f89923e3d2 (diff) | |
doc: Use proper note and warning annotations
The documentation contains plenty of notes and warnings. Enable
special rendering of these blocks by converting the note prefix
into a .. note:: annotation.
Change-Id: I34e26ca6bf313d335672ab6c2645741900338822
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
Diffstat (limited to 'docs/index.rst')
| -rw-r--r-- | docs/index.rst | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/docs/index.rst b/docs/index.rst index b0eff61d..6f6cfdff 100644 --- a/docs/index.rst +++ b/docs/index.rst @@ -153,7 +153,8 @@ The latest version of the AArch64 build of TF-A has been tested on the following Arm FVPs without shifted affinities, and that do not support threaded CPU cores (64-bit host machine only). -The FVP models used are Version 11.5 Build 33, unless otherwise stated. +.. note:: + The FVP models used are Version 11.5 Build 33, unless otherwise stated. - ``FVP_Base_AEMv8A-AEMv8A`` - ``FVP_Base_AEMv8A-AEMv8A-AEMv8A-AEMv8A-CCN502`` @@ -190,7 +191,8 @@ Arm FVPs without shifted affinities, and that do not support threaded CPU cores - ``FVP_Base_AEMv8A-AEMv8A`` - ``FVP_Base_Cortex-A32x4`` -NOTE: The ``FVP_Base_RevC-2xAEMv8A`` FVP only supports shifted affinities. +.. note:: + The ``FVP_Base_RevC-2xAEMv8A`` FVP only supports shifted affinities. The Foundation FVP can be downloaded free of charge. The Base FVPs can be licensed from Arm. See the `Arm FVP website`_. |