diff options
| author | Paul Beesley <paul.beesley@arm.com> | 2019-03-13 16:20:44 +0000 |
|---|---|---|
| committer | Paul Beesley <paul.beesley@arm.com> | 2019-05-22 11:28:17 +0100 |
| commit | e1c5026ac7e9da1b74047bf8cb9be2a5c9564532 (patch) | |
| tree | 3bb1ef189bb925077dc61581521cf4f3ffa979dc /docs/design/reset-design.rst | |
| parent | f94102ba965709aa6110e60b03a6d9f89923e3d2 (diff) | |
doc: Use proper note and warning annotations
The documentation contains plenty of notes and warnings. Enable
special rendering of these blocks by converting the note prefix
into a .. note:: annotation.
Change-Id: I34e26ca6bf313d335672ab6c2645741900338822
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
Diffstat (limited to 'docs/design/reset-design.rst')
| -rw-r--r-- | docs/design/reset-design.rst | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/docs/design/reset-design.rst b/docs/design/reset-design.rst index b5c9bb41..ccd717a0 100644 --- a/docs/design/reset-design.rst +++ b/docs/design/reset-design.rst @@ -23,10 +23,11 @@ configuration, some of these steps might be unnecessary. The following sections guide the platform integrator by indicating which build options exclude which steps, depending on the capability of the platform. -Note: If BL31 is used as the TF-A entry point instead of BL1, the diagram -above is still relevant, as all these operations will occur in BL31 in -this case. Please refer to section 6 "Using BL31 entrypoint as the reset -address" for more information. +.. note:: + If BL31 is used as the TF-A entry point instead of BL1, the diagram + above is still relevant, as all these operations will occur in BL31 in + this case. Please refer to section 6 "Using BL31 entrypoint as the reset + address" for more information. Programmable CPU reset address ------------------------------ |