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| author | Paul Beesley <paul.beesley@arm.com> | 2019-03-13 15:49:27 +0000 |
|---|---|---|
| committer | Paul Beesley <paul.beesley@arm.com> | 2019-05-22 11:28:17 +0100 |
| commit | a2c320a83ef3966b30929636fb8345a7eabee2ae (patch) | |
| tree | ef63058c61e521b6851637d267ead1416dbf3fb2 /docs/design/reset-design.rst | |
| parent | 29c02529592fb2489edee6c92e418918e5732105 (diff) | |
doc: Reorganise images and update links
Change-Id: I679d1499376a524bef1cfc33df995b0a719b5ac8
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
Diffstat (limited to 'docs/design/reset-design.rst')
| -rw-r--r-- | docs/design/reset-design.rst | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/docs/design/reset-design.rst b/docs/design/reset-design.rst index c38f6274..b5c9bb41 100644 --- a/docs/design/reset-design.rst +++ b/docs/design/reset-design.rst @@ -154,7 +154,7 @@ This might be done by the Trusted Boot Firmware or by platform code in BL31. .. _Firmware Design: firmware-design.rst .. _User Guide: ../getting_started/user-guide.rst -.. |Default reset code flow| image:: ../diagrams/default_reset_code.png?raw=true -.. |Reset code flow with programmable reset address| image:: ../diagrams/reset_code_no_boot_type_check.png?raw=true -.. |Reset code flow with single CPU released out of reset| image:: ../diagrams/reset_code_no_cpu_check.png?raw=true -.. |Reset code flow with programmable reset address and single CPU released out of reset| image:: ../diagrams/reset_code_no_checks.png?raw=true +.. |Default reset code flow| image:: ../resources/diagrams/default_reset_code.png +.. |Reset code flow with programmable reset address| image:: ../resources/diagrams/reset_code_no_boot_type_check.png +.. |Reset code flow with single CPU released out of reset| image:: ../resources/diagrams/reset_code_no_cpu_check.png +.. |Reset code flow with programmable reset address and single CPU released out of reset| image:: ../resources/diagrams/reset_code_no_checks.png |