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| author | Justin Chadwell <justin.chadwell@arm.com> | 2019-07-18 16:16:32 +0100 |
|---|---|---|
| committer | Justin Chadwell <justin.chadwell@arm.com> | 2019-09-09 16:23:41 +0100 |
| commit | 88d493fb1b0a780809aea491fc30a145af92930b (patch) | |
| tree | 0858a166b5cdc848a5a2f6efb41d4622ce4db815 /docs/design/firmware-design.rst | |
| parent | 9dd94382bd23db0fa201b254dc3f1bebdfd627c2 (diff) | |
Add documentation for CTX_INCLUDE_MTE_REGS
A new build flag, CTX_INCLUDE_MTE_REGS, has been added; this patch adds
documentation for it in the User Guide along with instructions of what
different values mean.
Change-Id: I430a9c6ced06b1b6be317edbeff4f5530e30f63a
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
Diffstat (limited to 'docs/design/firmware-design.rst')
| -rw-r--r-- | docs/design/firmware-design.rst | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/docs/design/firmware-design.rst b/docs/design/firmware-design.rst index 00e199a2..dc082082 100644 --- a/docs/design/firmware-design.rst +++ b/docs/design/firmware-design.rst @@ -2581,7 +2581,16 @@ Armv8.5-A ~~~~~~~~~ - Branch Target Identification feature is selected by ``BRANCH_PROTECTION`` - option set to 1. This option defaults to 0 and this is an experimental feature. + option set to 1. This option defaults to 0 and this is an experimental + feature. + +- Memory Tagging Extension feature is unconditionally enabled for both worlds + (at EL0 and S-EL0) if it is only supported at EL0. If instead it is + implemented at all ELs, it is unconditionally enabled for only the normal + world. To enable it for the secure world as well, the build option + ``CTX_INCLUDE_MTE_REGS`` is required. If the hardware does not implement + MTE support at all, it is always disabled, no matter what build options + are used. Armv7-A ~~~~~~~ |