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authorEtienne Carriere <etienne.carriere@linaro.org>2017-11-08 13:49:12 +0100
committerEtienne Carriere <etienne.carriere@linaro.org>2017-11-08 13:49:12 +0100
commit70896274bac4b2c420f115fb71a677e516048797 (patch)
tree223418c02af67662c0e794f9e58b12d5b2c858da /bl32
parent26e63c4450b1e4dcef3f9256663f36253e6b62d2 (diff)
ARMv7 requires the clear exclusive access at monitor entry
Clear exclusive monitor on SMC and FIQ entry for ARMv7 cores. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Diffstat (limited to 'bl32')
-rw-r--r--bl32/sp_min/aarch32/entrypoint.S18
1 files changed, 13 insertions, 5 deletions
diff --git a/bl32/sp_min/aarch32/entrypoint.S b/bl32/sp_min/aarch32/entrypoint.S
index cd9fe5cb..b2b7953f 100644
--- a/bl32/sp_min/aarch32/entrypoint.S
+++ b/bl32/sp_min/aarch32/entrypoint.S
@@ -30,6 +30,16 @@
stcopr \reg, SCR
.endm
+ .macro clrex_on_monitor_entry
+#if (ARM_ARCH_MAJOR == 7)
+ /*
+ * ARMv7 architectures need to clear the exclusive access when
+ * entering Monitor mode.
+ */
+ clrex
+#endif
+ .endm
+
vector_base sp_min_vector_table
b sp_min_entrypoint
b plat_panic_handler /* Undef */
@@ -147,6 +157,8 @@ func handle_smc
smcc_save_gp_mode_regs
+ clrex_on_monitor_entry
+
/*
* `sp` still points to `smc_ctx_t`. Save it to a register
* and restore the C runtime stack pointer to `sp`.
@@ -203,11 +215,7 @@ func handle_fiq
smcc_save_gp_mode_regs
- /*
- * AArch32 architectures need to clear the exclusive access when
- * entering Monitor mode.
- */
- clrex
+ clrex_on_monitor_entry
/* load run-time stack */
mov r2, sp