summaryrefslogtreecommitdiff
path: root/bl32
diff options
context:
space:
mode:
authorDimitris Papastamos <dimitris.papastamos@arm.com>2018-04-06 15:29:34 +0100
committerDimitris Papastamos <dimitris.papastamos@arm.com>2018-05-23 12:45:48 +0100
commit2c3a10780df3317c004de74fbe85df53daab94e5 (patch)
treeea2dcc4903eac07aa7b1c1c83f3f72373b8ca0d8 /bl32
parent0d018306d41a36582830e58761cba9d5b647f05b (diff)
Rename symbols and files relating to CVE-2017-5715
This patch renames symbols and files relating to CVE-2017-5715 to make it easier to introduce new symbols and files for new CVE mitigations. Change-Id: I24c23822862ca73648c772885f1690bed043dbc7 Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
Diffstat (limited to 'bl32')
-rw-r--r--bl32/sp_min/sp_min.mk4
-rw-r--r--bl32/sp_min/wa_cve_2017_5715_bpiall.S (renamed from bl32/sp_min/workaround_cve_2017_5715_bpiall.S)4
-rw-r--r--bl32/sp_min/wa_cve_2017_5715_icache_inv.S (renamed from bl32/sp_min/workaround_cve_2017_5715_icache_inv.S)4
3 files changed, 6 insertions, 6 deletions
diff --git a/bl32/sp_min/sp_min.mk b/bl32/sp_min/sp_min.mk
index 193b1d5e..6233299d 100644
--- a/bl32/sp_min/sp_min.mk
+++ b/bl32/sp_min/sp_min.mk
@@ -29,8 +29,8 @@ BL32_SOURCES += lib/extensions/amu/aarch32/amu.c\
endif
ifeq (${WORKAROUND_CVE_2017_5715},1)
-BL32_SOURCES += bl32/sp_min/workaround_cve_2017_5715_bpiall.S \
- bl32/sp_min/workaround_cve_2017_5715_icache_inv.S
+BL32_SOURCES += bl32/sp_min/wa_cve_2017_5715_bpiall.S \
+ bl32/sp_min/wa_cve_2017_5715_icache_inv.S
endif
BL32_LINKERFILE := bl32/sp_min/sp_min.ld.S
diff --git a/bl32/sp_min/workaround_cve_2017_5715_bpiall.S b/bl32/sp_min/wa_cve_2017_5715_bpiall.S
index 5387cefc..385f3d4b 100644
--- a/bl32/sp_min/workaround_cve_2017_5715_bpiall.S
+++ b/bl32/sp_min/wa_cve_2017_5715_bpiall.S
@@ -6,9 +6,9 @@
#include <asm_macros.S>
- .globl workaround_bpiall_runtime_exceptions
+ .globl wa_cve_2017_5715_bpiall_vbar
-vector_base workaround_bpiall_runtime_exceptions
+vector_base wa_cve_2017_5715_bpiall_vbar
/* We encode the exception entry in the bottom 3 bits of SP */
add sp, sp, #1 /* Reset: 0b111 */
add sp, sp, #1 /* Undef: 0b110 */
diff --git a/bl32/sp_min/workaround_cve_2017_5715_icache_inv.S b/bl32/sp_min/wa_cve_2017_5715_icache_inv.S
index 9102b02f..d0a46250 100644
--- a/bl32/sp_min/workaround_cve_2017_5715_icache_inv.S
+++ b/bl32/sp_min/wa_cve_2017_5715_icache_inv.S
@@ -6,9 +6,9 @@
#include <asm_macros.S>
- .globl workaround_icache_inv_runtime_exceptions
+ .globl wa_cve_2017_5715_icache_inv_vbar
-vector_base workaround_icache_inv_runtime_exceptions
+vector_base wa_cve_2017_5715_icache_inv_vbar
/* We encode the exception entry in the bottom 3 bits of SP */
add sp, sp, #1 /* Reset: 0b111 */
add sp, sp, #1 /* Undef: 0b110 */