diff options
author | davidcunado-arm <david.cunado@arm.com> | 2017-06-23 08:39:19 +0100 |
---|---|---|
committer | GitHub <noreply@github.com> | 2017-06-23 08:39:19 +0100 |
commit | ee881c15d0d8ec12a07afe394541a908b23dc5f1 (patch) | |
tree | 37d15e397eb1cab4b979afa18443f53b08fe39d3 /bl32 | |
parent | 86ef3401f7b8497e5227179bce0b6b2ead787fba (diff) | |
parent | 18f2efd67d881fe0a9a535ce9e801e60d746e024 (diff) |
Merge pull request #995 from davidcunado-arm/dc/init_reg
Fully initialise essential control registers
Diffstat (limited to 'bl32')
-rw-r--r-- | bl32/sp_min/aarch32/entrypoint.S | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/bl32/sp_min/aarch32/entrypoint.S b/bl32/sp_min/aarch32/entrypoint.S index e145511d..b3fccdec 100644 --- a/bl32/sp_min/aarch32/entrypoint.S +++ b/bl32/sp_min/aarch32/entrypoint.S @@ -49,12 +49,12 @@ func sp_min_entrypoint * sp_min_entrypoint() during the cold boot flow, so the cold/warm boot * and primary/secondary CPU logic should not be executed in this case. * - * Also, assume that the previous bootloader has already set up the CPU - * endianness and has initialised the memory. + * Also, assume that the previous bootloader has already initialised the + * SCTLR, including the CPU endianness, and has initialised the memory. * --------------------------------------------------------------------- */ el3_entrypoint_common \ - _set_endian=0 \ + _init_sctlr=0 \ _warm_boot_mailbox=0 \ _secondary_cold_boot=0 \ _init_memory=0 \ @@ -75,7 +75,7 @@ func sp_min_entrypoint * --------------------------------------------------------------------- */ el3_entrypoint_common \ - _set_endian=1 \ + _init_sctlr=1 \ _warm_boot_mailbox=!PROGRAMMABLE_RESET_ADDRESS \ _secondary_cold_boot=!COLD_BOOT_SINGLE_CPU \ _init_memory=1 \ @@ -174,7 +174,7 @@ func sp_min_warm_entrypoint * 'el3_entrypoint_common' must be skipped: * * - Only when the platform bypasses the BL1/BL32 (SP_MIN) entrypoint by - * programming the reset address do we need to set the CPU endianness. + * programming the reset address do we need to initialied the SCTLR. * In other cases, we assume this has been taken care by the * entrypoint code. * @@ -187,7 +187,7 @@ func sp_min_warm_entrypoint * it has been done once and for all on the cold boot path. */ el3_entrypoint_common \ - _set_endian=PROGRAMMABLE_RESET_ADDRESS \ + _init_sctlr=PROGRAMMABLE_RESET_ADDRESS \ _warm_boot_mailbox=0 \ _secondary_cold_boot=0 \ _init_memory=0 \ |